Implement RoCC and add a dummy RoCC

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 2ac326698f5a1292ef845e71582b7425a20156d7..9ab61b6257015441e49d32bc8c94c7f2a0d47997 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -48,7 +48,7 @@ sim_t::~sim_t()
 {
   for (size_t i = 0; i < procs.size(); i++)
   {
-    mmu_t* pmmu = &procs[i]->mmu;
+    mmu_t* pmmu = procs[i]->get_mmu();
     delete procs[i];
     delete pmmu;
   }