Pass target machine's return code back to OS

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 4d61555d0b6a8a440812a4ed4ce6453534df6e44..c800e877a348807b8f1307f7e556967267317f97 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -72,7 +72,7 @@ reg_t sim_t::get_scr(int which)
   }
 }
 
-void sim_t::run()
+int sim_t::run()
 {
   while (htif->tick())
   {
@@ -81,6 +81,7 @@ void sim_t::run()
     else
       step(INTERLEAVE);
   }
+  return htif->exit_code();
 }
 
 void sim_t::step(size_t n)