Set tval to 0 on traps with no specified tval

[riscv-isa-sim.git] / softfloat / platform.h

diff --git a/softfloat/platform.h b/softfloat/platform.h
index 3d9c431e329864cb91caad9ccb7b16d1657e1d68..03dd429fafef7c0170fa344eec1684f73ae61fef 100644 (file)
--- a/softfloat/platform.h
+++ b/softfloat/platform.h
@@ -44,5 +44,5 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 /*----------------------------------------------------------------------------
 *----------------------------------------------------------------------------*/
-#define INLINE extern inline
+#define INLINE static inline