Split ERET into URET, SRET, HRET, MRET

[riscv-isa-sim.git] / spike_main / disasm.cc

diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc
index 2bd9b6a1b2e7e30bf7435b91bf076a05c1d66fe4..0d239d74df6dbda9f48fa7c58c15257e0d0d061a 100644 (file)
--- a/spike_main/disasm.cc
+++ b/spike_main/disasm.cc
@@ -22,7 +22,7 @@ struct : public arg_t {
 
 struct : public arg_t {
   std::string to_string(insn_t insn) const {
-    return std::string("0(") + xpr_name[insn.rs1()] + ')';
+    return std::string("(") + xpr_name[insn.rs1()] + ')';
   }
 } amo_address;
 
@@ -212,12 +212,6 @@ struct : public arg_t {
   }
 } rvc_sdsp_address;
 
-struct : public arg_t {
-  std::string to_string(insn_t insn) const {
-    return std::to_string((int)insn.rvc_lb_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
-  }
-} rvc_lb_address;
-
 struct : public arg_t {
   std::string to_string(insn_t insn) const {
     return std::to_string((int)insn.rvc_lw_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
@@ -416,8 +410,12 @@ disassembler_t::disassembler_t()
   DEFINE_RTYPE(remw);
   DEFINE_RTYPE(remuw);
 
-  DEFINE_NOARG(scall);
-  DEFINE_NOARG(sbreak);
+  DEFINE_NOARG(ecall);
+  DEFINE_NOARG(ebreak);
+  DEFINE_NOARG(uret);
+  DEFINE_NOARG(sret);
+  DEFINE_NOARG(hret);
+  DEFINE_NOARG(mret);
   DEFINE_NOARG(fence);
   DEFINE_NOARG(fence_i);
 
@@ -434,7 +432,6 @@ disassembler_t::disassembler_t()
   add_insn(new disasm_insn_t("csrrwi", match_csrrwi, mask_csrrwi, {&xrd, &csr, &zimm5}));
   add_insn(new disasm_insn_t("csrrsi", match_csrrsi, mask_csrrsi, {&xrd, &csr, &zimm5}));
   add_insn(new disasm_insn_t("csrrci", match_csrrci, mask_csrrci, {&xrd, &csr, &zimm5}));
-  DEFINE_NOARG(sret)
 
   DEFINE_FRTYPE(fadd_s);
   DEFINE_FRTYPE(fsub_s);
@@ -503,7 +500,7 @@ disassembler_t::disassembler_t()
   DISASM_INSN("jr", c_li, mask_rvc_imm, {&rvc_rs1});
   DISASM_INSN("jalr", c_lui, mask_rvc_imm, {&rvc_rs1});
   DISASM_INSN("nop", c_addi, mask_rd | mask_rvc_imm, {});
-  DISASM_INSN("addi", c_addi, mask_rd, {&rvc_sp, &rvc_sp, &rvc_addi16sp_imm});
+  DISASM_INSN("addi", c_addi16sp, mask_rd, {&rvc_sp, &rvc_sp, &rvc_addi16sp_imm});
   DISASM_INSN("addi", c_addi4spn, 0, {&rvc_rs1s, &rvc_sp, &rvc_addi4spn_imm});
   DISASM_INSN("li", c_li, 0, {&xrd, &rvc_imm});
   DISASM_INSN("lui", c_lui, 0, {&xrd, &rvc_uimm});
@@ -518,13 +515,10 @@ disassembler_t::disassembler_t()
   DISASM_INSN("and", c_and, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
   DISASM_INSN("or", c_or, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
   DISASM_INSN("xor", c_xor, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
-  DISASM_INSN("sll", c_sll, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
-  DISASM_INSN("srl", c_srl, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
   DISASM_INSN("lw", c_lwsp, 0, {&xrd, &rvc_lwsp_address});
   DISASM_INSN("flw", c_flwsp, 0, {&xrd, &rvc_lwsp_address});
   DISASM_INSN("sw", c_swsp, 0, {&rvc_rs2, &rvc_swsp_address});
   DISASM_INSN("fsw", c_fswsp, 0, {&rvc_rs2, &rvc_swsp_address});
-  DISASM_INSN("lbu", c_lbu, 0, {&rvc_rs2s, &rvc_lb_address});
   DISASM_INSN("lw", c_lw, 0, {&rvc_rs2s, &rvc_lw_address});
   DISASM_INSN("flw", c_flw, 0, {&rvc_rs2s, &rvc_lw_address});
   DISASM_INSN("sw", c_sw, 0, {&rvc_rs2s, &rvc_lw_address});