Refactor remote bitbang code.

[riscv-isa-sim.git] / spike_main / spike.cc

diff --git a/spike_main/spike.cc b/spike_main/spike.cc
index ab5cea554957a97e388e7d71e351c94f8bffb332..844d8e82d9aa927c0c2cf73215fee8f4397cc87c 100644 (file)
--- a/spike_main/spike.cc
+++ b/spike_main/spike.cc
@@ -1,14 +1,14 @@
 // See LICENSE for license details.
 
 #include "sim.h"
-#include "htif.h"
+#include "mmu.h"
+#include "remote_bitbang.h"
 #include "cachesim.h"
 #include "extension.h"
 #include <dlfcn.h>
 #include <fesvr/option_parser.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include <getopt.h>
 #include <vector>
 #include <string>
 #include <memory>
@@ -17,41 +17,57 @@ static void help()
 {
   fprintf(stderr, "usage: spike [host options] <target program> [target options]\n");
   fprintf(stderr, "Host Options:\n");
-  fprintf(stderr, "  -p <n>             Simulate <n> processors\n");
-  fprintf(stderr, "  -m <n>             Provide <n> MB of target memory\n");
-  fprintf(stderr, "  -d                 Interactive debug mode\n");
-  fprintf(stderr, "  -g                 Track histogram of PCs\n");
-  fprintf(stderr, "  -h                 Print this help message\n");
-  fprintf(stderr, "  --ic=<S>:<W>:<B>   Instantiate a cache model with S sets,\n");
-  fprintf(stderr, "  --dc=<S>:<W>:<B>     W ways, and B-byte blocks (with S and\n");
-  fprintf(stderr, "  --l2=<S>:<W>:<B>     B both powers of 2).\n");
-  fprintf(stderr, "  --extension=<name> Specify RoCC Extension\n");
-  fprintf(stderr, "  --extlib=<name>    Shared library to load\n");
+  fprintf(stderr, "  -p<n>                 Simulate <n> processors [default 1]\n");
+  fprintf(stderr, "  -m<n>                 Provide <n> MiB of target memory [default 4096]\n");
+  fprintf(stderr, "  -d                    Interactive debug mode\n");
+  fprintf(stderr, "  -g                    Track histogram of PCs\n");
+  fprintf(stderr, "  -l                    Generate a log of execution\n");
+  fprintf(stderr, "  -h                    Print this help message\n");
+  fprintf(stderr, "  -H                 Start halted, allowing a debugger to connect\n");
+  fprintf(stderr, "  --isa=<name>          RISC-V ISA string [default %s]\n", DEFAULT_ISA);
+  fprintf(stderr, "  --ic=<S>:<W>:<B>      Instantiate a cache model with S sets,\n");
+  fprintf(stderr, "  --dc=<S>:<W>:<B>        W ways, and B-byte blocks (with S and\n");
+  fprintf(stderr, "  --l2=<S>:<W>:<B>        B both powers of 2).\n");
+  fprintf(stderr, "  --extension=<name>    Specify RoCC Extension\n");
+  fprintf(stderr, "  --extlib=<name>       Shared library to load\n");
+  fprintf(stderr, "  --rbb-port=<port>     Listen on <port> for remote bitbang connection\n");
+  fprintf(stderr, "  --dump-config-string  Print platform configuration string and exit\n");
   exit(1);
 }
 
 int main(int argc, char** argv)
 {
   bool debug = false;
+  bool halted = false;
   bool histogram = false;
+  bool log = false;
+  bool dump_config_string = false;
   size_t nprocs = 1;
   size_t mem_mb = 0;
   std::unique_ptr<icache_sim_t> ic;
   std::unique_ptr<dcache_sim_t> dc;
   std::unique_ptr<cache_sim_t> l2;
   std::function<extension_t*()> extension;
+  const char* isa = DEFAULT_ISA;
+  uint16_t rbb_port = 0;
 
   option_parser_t parser;
   parser.help(&help);
   parser.option('h', 0, 0, [&](const char* s){help();});
   parser.option('d', 0, 0, [&](const char* s){debug = true;});
   parser.option('g', 0, 0, [&](const char* s){histogram = true;});
+  parser.option('l', 0, 0, [&](const char* s){log = true;});
   parser.option('p', 0, 1, [&](const char* s){nprocs = atoi(s);});
   parser.option('m', 0, 1, [&](const char* s){mem_mb = atoi(s);});
+  // I wanted to use --halted, but for some reason that doesn't work.
+  parser.option('H', 0, 0, [&](const char* s){halted = true;});
+  parser.option(0, "rbb-port", 1, [&](const char* s){rbb_port = atoi(s);});
   parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));});
   parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));});
   parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));});
+  parser.option(0, "isa", 1, [&](const char* s){isa = s;});
   parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);});
+  parser.option(0, "dump-config-string", 0, [&](const char *s){dump_config_string = true;});
   parser.option(0, "extlib", 1, [&](const char *s){
     void *lib = dlopen(s, RTLD_NOW | RTLD_GLOBAL);
     if (lib == NULL) {
@@ -61,10 +77,22 @@ int main(int argc, char** argv)
   });
 
   auto argv1 = parser.parse(argv);
+  std::vector<std::string> htif_args(argv1, (const char*const*)argv + argc);
+  sim_t s(isa, nprocs, mem_mb, halted, htif_args);
+  std::unique_ptr<jtag_dtm_t> jtag_dtm(new jtag_dtm_t());
+  std::unique_ptr<remote_bitbang_t> remote_bitbang;
+  if (rbb_port) {
+    remote_bitbang.reset(new remote_bitbang_t(rbb_port, &(*jtag_dtm)));
+    s.set_remote_bitbang(&(*remote_bitbang));
+  }
+
+  if (dump_config_string) {
+    printf("%s", s.get_config_string());
+    return 0;
+  }
+
   if (!*argv1)
     help();
-  std::vector<std::string> htif_args(argv1, (const char*const*)argv + argc);
-  sim_t s(nprocs, mem_mb, htif_args);
 
   if (ic && l2) ic->set_miss_handler(&*l2);
   if (dc && l2) dc->set_miss_handler(&*l2);
@@ -76,6 +104,7 @@ int main(int argc, char** argv)
   }
 
   s.set_debug(debug);
+  s.set_log(log);
   s.set_histogram(histogram);
   return s.run();
 }