Add Tercel PHY reset synchronization
[microwatt.git] / litedram / generated /
2022-02-22 Raptor Engineering... Add initial Arctic Tern support
2020-08-13 Michael NeulingMerge pull request #235 from paulusmack/master
2020-08-13 Michael NeulingMerge pull request #236 from ozbenh/targets
2020-08-07 Boris Shingarovfpga: Add support for Genesys2
2020-08-07 Benjamin Herrenschmidtacorn: Add support for the Acorn CLE 215+
2020-08-07 Michael NeulingMerge pull request #229 from ozbenh/litedram
2020-07-08 Benjamin Herrenschmidtlitedram: Regenerate
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-29 Michael NeulingMerge pull request #213 from ozbenh/uart16550
2020-06-29 Michael NeulingMerge pull request #212 from ozbenh/liteeth
2020-06-23 Benjamin Herrenschmidtconsole: Add support for the 16550 UART
2020-06-23 Benjamin Herrenschmidtliteeth: Hook up LiteX LiteEth ethernet controller
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-17 Paul MackerrasMerge pull request #207 from ozbenh/misc
2020-06-14 Benjamin Herrenschmidtsoc: Rename wb_dram_ctrl to wb_ext_io and rework decoding
2020-06-13 Paul MackerrasMerge pull request #204 from ozbenh/spi
2020-06-13 Benjamin Herrenschmidtspi: Add booting from flash to litedram init
2020-06-10 Paul MackerrasMerge pull request #194 from ozbenh/misc
2020-06-10 Benjamin Herrenschmidtlitedram: Fix DRAM init mem using too many address...
2020-06-05 Paul MackerrasMerge pull request #191 from ozbenh/litedram
2020-06-05 Benjamin Herrenschmidtlitedram: Remove old "VexRiscV" based initializations
2020-06-05 Paul MackerrasMerge pull request #183 from shawnanastasio/addpcis
2020-06-05 Benjamin Herrenschmidtlitedram: Update to latest LiteX/LiteDRAM version
2020-06-05 Benjamin Herrenschmidtlitedram: Test bench
2020-06-05 Benjamin Herrenschmidtlitedram: Add an L2 cache with store queue
2020-06-05 Benjamin Herrenschmidtlitedram: Add support for booting without BRAM
2020-06-05 Benjamin Herrenschmidtlitedram: Add simulation support
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Anton BlanchardMerge pull request #178 from antonblanchard/intercon
2020-05-25 Benjamin Herrenschmidtlitedram: Split the init memory from the main wrapper
2020-05-25 Benjamin Herrenschmidtsoc: Rework interconnect
2020-05-19 Anton BlanchardMerge pull request #173 from Jbalkind/core-vcs-syntax
2020-05-19 Anton BlanchardMerge pull request #177 from antonblanchard/litedram
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-16 Benjamin Herrenschmidtlitedram: Regenerate
2020-05-16 Benjamin Herrenschmidtlitedram: Update to new LiteX/LiteDRAM version
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-14 Anton BlanchardMerge pull request #170 from antonblanchard/litedram
2020-05-09 Benjamin Herrenschmidtlitedram: Use 32-bit CSR bus
2020-05-09 Benjamin Herrenschmidtlitedram: Add support for Microwatt-initialized controller
2020-05-08 Benjamin Herrenschmidtlitedram: Add basic support for LiteX LiteDRAM