| 2019-06-28 |
Luke Kenneth Casso... | fix fprintfs |
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| 2019-06-28 |
Luke Kenneth Casso... | remove src suboffset |
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| 2019-06-28 |
Luke Kenneth Casso... | sub-loop independent (only one offset) |
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| 2019-06-27 |
Luke Kenneth Casso... | make vlen loop run times subvl, set subvl default to... |
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| 2019-06-27 |
Luke Kenneth Casso... | pass sub-offset down through remap in sv_insn_t into... |
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| 2019-06-27 |
Luke Kenneth Casso... | add the subvl offset to sv_insn_t |
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| 2019-06-27 |
Luke Kenneth Casso... | rename sub offsets |
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| 2019-06-27 |
Luke Kenneth Casso... | add comments |
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| 2019-06-27 |
Luke Kenneth Casso... | add in use of inc_offs and sub-src/dest offsets |
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| 2018-11-29 |
Luke Kenneth Casso... | start to update predicated Branch to latest spec |
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| 2018-11-29 |
Luke Kenneth Casso... | on branch, obtain the predicate inversion flag |
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| 2018-11-15 |
Luke Kenneth Casso... | add in predication remapping into src, dest and branch... |
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| 2018-11-14 |
Luke Kenneth Casso... | comment out debug code not needed |
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| 2018-11-03 |
Luke Kenneth Casso... | add debug on zeroing-predication c.mv |
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| 2018-11-03 |
Luke Kenneth Casso... | add state redirection for CSR get/set depending on... |
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| 2018-11-02 |
Luke Kenneth Casso... | add twin src and dest flen instruction testing |
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| 2018-11-01 |
Luke Kenneth Casso... | add instruction flen detection |
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| 2018-10-30 |
Luke Kenneth Casso... | on scalar redirected reg, break hardware loop at first... |
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| 2018-10-29 |
Luke Kenneth Casso... | fix niggles in offset calculation for LD with elwidth |
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| 2018-10-26 |
Luke Kenneth Casso... | pass in sign-extend argument for use in non-default... |
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| 2018-10-25 |
Luke Kenneth Casso... | add variable bitwidth on read/write regs |
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| 2018-10-25 |
Luke Kenneth Casso... | add isvec to reg_spec_t, bit of cleanup |
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| 2018-10-25 |
Luke Kenneth Casso... | redirect DO_WRITE_FREG and READ_FREG and others |
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| 2018-10-25 |
Luke Kenneth Casso... | overload READ_REG |
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| 2018-10-25 |
Luke Kenneth Casso... | make reg_spec_t offset a pointer, sometimes it needs... |
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| 2018-10-25 |
Luke Kenneth Casso... | use reg_spec_t which passes reg + offset into sv_proc_t |
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| 2018-10-21 |
Luke Kenneth Casso... | calculate src bitwidth - very time-consuming, optimise... |
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| 2018-10-18 |
Luke Kenneth Casso... | fix debug printfs |
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| 2018-10-15 |
Luke Kenneth Casso... | fix annoying printf warning on fp compiles |
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| 2018-10-15 |
Luke Kenneth Casso... | whoops deref null pointer |
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| 2018-10-15 |
Luke Kenneth Casso... | c_beqz sv operational |
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| 2018-10-15 |
Luke Kenneth Casso... | add rvc_sp redirection/offset overload |
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| 2018-10-14 |
Luke Kenneth Casso... | move design to separate document |
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| 2018-10-14 |
Luke Kenneth Casso... | bit of a mess: attempted to create a complete arithmeti... |
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| 2018-10-12 |
Luke Kenneth Casso... | add WRITE_FRD macro redirect |
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| 2018-10-12 |
Luke Kenneth Casso... | proof-of-concept, redirect RS1 to class sv_proc_t |
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| 2018-10-12 |
Luke Kenneth Casso... | combination of redirection through a "property" class... |
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| 2018-10-11 |
Luke Kenneth Casso... | redirect instructions through a class called sv_proc_t |
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| 2018-10-09 |
Luke Kenneth Casso... | get predicated-vectorised branch working |
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| 2018-10-09 |
Luke Kenneth Casso... | save branch address and predication merged result,... |
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| 2018-10-09 |
Luke Kenneth Casso... | add explanatory comment |
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| 2018-10-09 |
Luke Kenneth Casso... | add explanatory comment |
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| 2018-10-09 |
Luke Kenneth Casso... | start adding explicit twin-predicated branch identifica... |
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| 2018-10-07 |
Luke Kenneth Casso... | override setpc macro so that sv can redirect it in... |
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| 2018-10-07 |
Luke Kenneth Casso... | swap #ifdef USING_NOREGS so that it is possible to... |
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| 2018-10-07 |
Luke Kenneth Casso... | add extra debug printing for c.lwsp |
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| 2018-10-07 |
Luke Kenneth Casso... | add rvc_swsp_imm sv overload, provides vector unit... |
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| 2018-10-06 |
Luke Kenneth Casso... | c.swsp and c.fswsp predication and offset enabling |
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| 2018-10-06 |
Luke Kenneth Casso... | allow x2 (sp) to be redirected in C.LWSP |
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| 2018-10-06 |
Luke Kenneth Casso... | temporary hack disabling SV in anything other than... |
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| 2018-10-06 |
Luke Kenneth Casso... | add in predication for immediate, for C.LWSP |
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| 2018-10-05 |
Luke Kenneth Casso... | reorganise src and dest vector-element offsets |
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| 2018-10-04 |
Luke Kenneth Casso... | reorganise twin-predication |
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| 2018-10-04 |
Luke Kenneth Casso... | big reorganisation to support twin-predication |
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| 2018-10-03 |
Luke Kenneth Casso... | add in twin-predication identification |
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| 2018-10-03 |
Luke Kenneth Casso... | decided not to change the behaviour of LOAD/STORE |
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| 2018-10-02 |
Luke Kenneth Casso... | start work on parallelsing LOAD, pass in parameter... |
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| 2018-10-02 |
Luke Kenneth Casso... | debug print for floating-point regs |
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| 2018-10-01 |
Luke Kenneth Casso... | add comment explaining why invert isnt done in zeroing... |
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| 2018-10-01 |
Luke Kenneth Casso... | add comment explaining use of insn._rd() in zeroing |
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| 2018-10-01 |
Luke Kenneth Casso... | whoops vloop continuation logic the wrong way round |
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| 2018-09-30 |
Luke Kenneth Casso... | update template comment |
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| 2018-09-30 |
Luke Kenneth Casso... | lots of debugging of predication, found other errors |
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| 2018-09-30 |
Luke Kenneth Casso... | add sv support for zeroing predication in dest register |
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| 2018-09-30 |
Luke Kenneth Casso... | add in predication to sv instruction execution |
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| 2018-09-30 |
Luke Kenneth Casso... | start linking in predication into sv |
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| 2018-09-30 |
Luke Kenneth Casso... | use an alternative logic for detecting scalar / loop-end |
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| 2018-09-29 |
Luke Kenneth Casso... | fix bug in sv template where FRS2 was checking rs3 |
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| 2018-09-29 |
Luke Kenneth Casso... | add checks for RVC registers to sv template |
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| 2018-09-29 |
Luke Kenneth Casso... | a LOT of debugging and fixing, sv loop actually working |
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| 2018-09-29 |
Luke Kenneth Casso... | reorganise from moving sv_pred_* and sv_reg_* tables... |
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| 2018-09-26 |
Luke Kenneth Casso... | save some cpu cycles by |ing the checks for vectorop... |
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| 2018-09-26 |
Luke Kenneth Casso... | whoops vectorop has to be |= not &= to accumulate ... |
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| 2018-09-26 |
Luke Kenneth Casso... | cache the sv redirected register values on each loop |
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| 2018-09-26 |
Luke Kenneth Casso... | remembered that the use of sv registers have to be... |
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| 2018-09-26 |
Luke Kenneth Casso... | ok this is tricky: an extra parameter has to be passed... |
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| 2018-09-26 |
Luke Kenneth Casso... | check if register redirection is active, and if vectori... |
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| 2018-09-26 |
Luke Kenneth Casso... | comment why sv_insn_t is set up the way it is; add... |
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| 2018-09-26 |
Luke Kenneth Casso... | shuffle things around a bit for sv, put rv32/64_name... |
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projects / riscv-isa-sim.git / history