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Use WRITE_RD/WRITE_FRD macros to write registers
[riscv-isa-sim.git]
/
riscv
/
insns
/
sc_d.h
2013-09-27
Andrew Waterman
Use WRITE_RD/WRITE_FRD macros to write registers
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2013-08-12
Andrew Waterman
Instructions are no longer member functions
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2013-03-30
Andrew Waterman
add load-reserved/store-conditional instructions
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