[xcc, sim] changed instruction format so imm12 subs for rs2
[riscv-isa-sim.git] / riscv / insns / sllw.h
2010-09-21 Andrew Waterman[xcc, sim] changed instruction format so imm12 subs...
2010-09-13 Andrew Waterman[sim] renamed sllv to sll (same for other shifts)
2010-09-13 Andrew Waterman[xcc, sim] moved shamt field and renamed shifts
2010-08-04 Andrew Waterman[pk,sim,xcc] Renamed instructions to RISC-V spec