projects
/
riscv-isa-sim.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
[xcc, sim] changed instruction format so imm12 subs for rs2
[riscv-isa-sim.git]
/
riscv
/
insns
/
srlw.h
2010-09-21
Andrew Waterman
[xcc, sim] changed instruction format so imm12 subs...
blob
|
commitdiff
|
raw
2010-09-13
Andrew Waterman
[sim] renamed sllv to sll (same for other shifts)
blob
|
commitdiff
|
raw
|
diff to current
2010-09-13
Andrew Waterman
[xcc, sim] moved shamt field and renamed shifts
blob
|
commitdiff
|
raw
2010-08-05
Andrew Waterman
[sim] Bug fixes in shifts, plus a new test case
blob
|
commitdiff
|
raw
|
diff to current
2010-08-04
Andrew Waterman
[pk,sim,xcc] Renamed instructions to RISC-V spec
blob
|
commitdiff
|
raw
|
diff to current
projects / riscv-isa-sim.git / history