git.libre-soc.org Git - riscv-isa-sim.git/history

2011-03-25	Andrew Waterman	[xcc,pk,opcodes,sim] updated encoding/insn names	blob \| commitdiff \| raw
2011-02-05	Andrew Waterman	[sim,pk] added interrupt-pending field to cause reg	blob \| commitdiff \| raw \| diff to current
2010-09-11	Andrew Waterman	[sim, pk] cleaned up exception vectors and FP exc flags	blob \| commitdiff \| raw \| diff to current
2010-08-05	Andrew Waterman	[xcc,pk,sim] Added first part of FP support	blob \| commitdiff \| raw \| diff to current
2010-07-19	Andrew Waterman	Reorganized directory structure	blob \| commitdiff \| raw \| diff to current

Simple-V augmented version of spike