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Allow the formal engine to perform a same-cycle result in the ALU
[soc.git]
/
src
/
soc
/
config
/
state.py
2021-04-23
Luke Kenneth Casso...
removing more as moved over to openpower-isa
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2021-02-26
Luke Kenneth Casso...
comment on CoreState
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2021-02-15
Tobias Platen
Merge branch 'master' of ssh://git.libre-riscv.org...
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2021-02-14
Luke Kenneth Casso...
add SVSTATE to CoreState
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2020-09-06
Luke Kenneth Casso...
add DEC SPR to CoreState and PowerDecoder, activate...
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2020-09-04
Luke Kenneth Casso...
adding option to include XICS external interrupts.
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2020-08-03
Luke Kenneth Casso...
use new soc.config.state CoreState class in DMI and...
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