soc.git
5 years agoexperimenting with score6600
Luke Kenneth Casson Leighton [Tue, 14 May 2019 09:02:18 +0000 (10:02 +0100)]
experimenting with score6600

5 years agoexperimenting with cscore
Luke Kenneth Casson Leighton [Tue, 14 May 2019 04:37:09 +0000 (05:37 +0100)]
experimenting with cscore

5 years agolatch Function Unit registers based on "issue" signal
Luke Kenneth Casson Leighton [Tue, 14 May 2019 04:27:09 +0000 (05:27 +0100)]
latch Function Unit registers based on "issue" signal

5 years agocomb on intpick
Luke Kenneth Casson Leighton [Mon, 13 May 2019 22:24:07 +0000 (23:24 +0100)]
comb on intpick

5 years agoscore6600 working without FunctionUnit (using dep matrices)
Luke Kenneth Casson Leighton [Mon, 13 May 2019 22:08:16 +0000 (23:08 +0100)]
score6600 working without FunctionUnit (using dep matrices)

5 years agosync on req_rel
Luke Kenneth Casson Leighton [Mon, 13 May 2019 21:07:54 +0000 (22:07 +0100)]
sync on req_rel

5 years agoreturn to latch on src for oper
Luke Kenneth Casson Leighton [Mon, 13 May 2019 21:07:38 +0000 (22:07 +0100)]
return to latch on src for oper

5 years agorename intermediate signals to wr_wait/rd_wait
Luke Kenneth Casson Leighton [Mon, 13 May 2019 19:03:23 +0000 (20:03 +0100)]
rename intermediate signals to wr_wait/rd_wait

5 years agosplit out readable/writable setup
Luke Kenneth Casson Leighton [Mon, 13 May 2019 19:01:29 +0000 (20:01 +0100)]
split out readable/writable setup

5 years agogo_rd/go_wr not arrays any more
Luke Kenneth Casson Leighton [Mon, 13 May 2019 14:32:18 +0000 (15:32 +0100)]
go_rd/go_wr not arrays any more

5 years agouse operand latch, seems to work (6600 not cscore)
Luke Kenneth Casson Leighton [Mon, 13 May 2019 13:38:15 +0000 (14:38 +0100)]
use operand latch, seems to work (6600 not cscore)

5 years agoadd fn-unit src/dest latch registers
Luke Kenneth Casson Leighton [Mon, 13 May 2019 13:20:41 +0000 (14:20 +0100)]
add fn-unit src/dest latch registers

5 years agomake read/write-pending syncd
Luke Kenneth Casson Leighton [Mon, 13 May 2019 07:38:58 +0000 (08:38 +0100)]
make read/write-pending syncd

5 years agouse signals instead of arrays
Luke Kenneth Casson Leighton [Mon, 13 May 2019 07:30:01 +0000 (08:30 +0100)]
use signals instead of arrays

5 years agomake insn_i a signal of length n_insns instead of Array
Luke Kenneth Casson Leighton [Mon, 13 May 2019 06:30:10 +0000 (07:30 +0100)]
make insn_i a signal of length n_insns instead of Array

5 years agoscoreboard 6600 semi-working (sync/comb issue)
Luke Kenneth Casson Leighton [Sun, 12 May 2019 17:14:26 +0000 (18:14 +0100)]
scoreboard 6600 semi-working (sync/comb issue)

5 years agoremove unneeded imports
Luke Kenneth Casson Leighton [Sun, 12 May 2019 16:45:15 +0000 (17:45 +0100)]
remove unneeded imports

5 years agoexperimenting / debugging score6600
Luke Kenneth Casson Leighton [Sun, 12 May 2019 16:37:25 +0000 (17:37 +0100)]
experimenting / debugging score6600

5 years agosplit function units (and read/write pending vectors) to separate module
Luke Kenneth Casson Leighton [Sun, 12 May 2019 16:02:53 +0000 (17:02 +0100)]
split function units (and read/write pending vectors) to separate module

5 years agosplit computation units to separate class
Luke Kenneth Casson Leighton [Sun, 12 May 2019 14:55:18 +0000 (15:55 +0100)]
split computation units to separate class

5 years agoadd debug prints
Luke Kenneth Casson Leighton [Sun, 12 May 2019 14:23:01 +0000 (15:23 +0100)]
add debug prints

5 years agodebugging score6600 matrix
Luke Kenneth Casson Leighton [Sat, 11 May 2019 16:17:17 +0000 (17:17 +0100)]
debugging score6600 matrix

5 years agodebug score6600
Luke Kenneth Casson Leighton [Sat, 11 May 2019 11:50:41 +0000 (12:50 +0100)]
debug score6600

5 years agodependence cell, src2 is combinatorial (latch is already synchronous)
Luke Kenneth Casson Leighton [Sat, 11 May 2019 10:47:36 +0000 (11:47 +0100)]
dependence cell, src2 is combinatorial (latch is already synchronous)

5 years agotry removing some syncs
Luke Kenneth Casson Leighton [Sat, 11 May 2019 10:45:51 +0000 (11:45 +0100)]
try removing some syncs

5 years agoadd in function units to score6600
Luke Kenneth Casson Leighton [Sat, 11 May 2019 10:43:49 +0000 (11:43 +0100)]
add in function units to score6600

5 years agolink function units back in to score6600
Luke Kenneth Casson Leighton [Sat, 11 May 2019 09:51:56 +0000 (10:51 +0100)]
link function units back in to score6600

5 years agouse register latching in Computation Unit
Luke Kenneth Casson Leighton [Sat, 11 May 2019 07:18:42 +0000 (08:18 +0100)]
use register latching in Computation Unit

5 years agowhoops, readable/writable is inverted in fu picker vector
Luke Kenneth Casson Leighton [Sat, 11 May 2019 07:18:26 +0000 (08:18 +0100)]
whoops, readable/writable is inverted in fu picker vector

5 years agodependency cells enable on q not qn
Luke Kenneth Casson Leighton [Fri, 10 May 2019 12:19:04 +0000 (13:19 +0100)]
dependency cells enable on q not qn

5 years agostart connecting fu and reg dep matrices
Luke Kenneth Casson Leighton [Fri, 10 May 2019 11:47:51 +0000 (12:47 +0100)]
start connecting fu and reg dep matrices

5 years agoadd variant using original (ish) 6600 scoreboard
Luke Kenneth Casson Leighton [Fri, 10 May 2019 10:43:07 +0000 (11:43 +0100)]
add variant using original (ish) 6600 scoreboard

5 years agosplit out register decode from issue unit
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:43:01 +0000 (06:43 +0100)]
split out register decode from issue unit

5 years agoderive from Elaboratable
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:12:34 +0000 (06:12 +0100)]
derive from Elaboratable

5 years agoremove unneeded imports
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:09:10 +0000 (06:09 +0100)]
remove unneeded imports

5 years agomove code around to get set associative cache working
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:08:21 +0000 (06:08 +0100)]
move code around to get set associative cache working

5 years agoupdate cam test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:02:50 +0000 (06:02 +0100)]
update cam test

5 years agoupdate pte test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:01:42 +0000 (06:01 +0100)]
update pte test

5 years agoupdate perm validator test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 05:00:46 +0000 (06:00 +0100)]
update perm validator test

5 years agoremove unneeded unit test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 04:59:28 +0000 (05:59 +0100)]
remove unneeded unit test

5 years agofix imports in LFSR test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 04:57:42 +0000 (05:57 +0100)]
fix imports in LFSR test

5 years agoupdate camentry unit test
Luke Kenneth Casson Leighton [Fri, 10 May 2019 04:56:51 +0000 (05:56 +0100)]
update camentry unit test

5 years agoadd src1/2 pending outputs
Luke Kenneth Casson Leighton [Fri, 10 May 2019 04:54:18 +0000 (05:54 +0100)]
add src1/2 pending outputs

5 years agoget scoreboard reasonably working
Luke Kenneth Casson Leighton [Thu, 9 May 2019 12:44:39 +0000 (13:44 +0100)]
get scoreboard reasonably working

5 years agodecode wrong way round on issue unit
Luke Kenneth Casson Leighton [Thu, 9 May 2019 11:20:32 +0000 (12:20 +0100)]
decode wrong way round on issue unit

5 years agoreduce ANDing chain (using NOR) in group picker
Luke Kenneth Casson Leighton [Thu, 9 May 2019 10:37:59 +0000 (11:37 +0100)]
reduce ANDing chain (using NOR) in group picker

5 years agofix logic-bug in group picker
Luke Kenneth Casson Leighton [Thu, 9 May 2019 08:26:48 +0000 (09:26 +0100)]
fix logic-bug in group picker

5 years agoadd python simulation of alu
Luke Kenneth Casson Leighton [Thu, 9 May 2019 01:34:28 +0000 (02:34 +0100)]
add python simulation of alu

5 years agomove sync from intpick to fn unit readable
Luke Kenneth Casson Leighton [Wed, 8 May 2019 16:41:20 +0000 (17:41 +0100)]
move sync from intpick to fn unit readable

5 years agomake readable_i sync, stops infinite loop
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:42:10 +0000 (12:42 +0100)]
make readable_i sync, stops infinite loop

5 years agoSRLatch not used in issue_unit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:20:38 +0000 (12:20 +0100)]
SRLatch not used in issue_unit

5 years agoadd some more experimental instructions
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:12:22 +0000 (12:12 +0100)]
add some more experimental instructions

5 years agoadd some more experimental instructions
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:11:49 +0000 (12:11 +0100)]
add some more experimental instructions

5 years agodisable writethru for now
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:07:14 +0000 (12:07 +0100)]
disable writethru for now

5 years agodisable fpissue
Luke Kenneth Casson Leighton [Wed, 8 May 2019 11:06:55 +0000 (12:06 +0100)]
disable fpissue

5 years agomake SR Latch async again, make busy signal sync into issue unit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 10:39:33 +0000 (11:39 +0100)]
make SR Latch async again, make busy signal sync into issue unit

5 years agorename variable wid -> dep
Luke Kenneth Casson Leighton [Wed, 8 May 2019 10:39:10 +0000 (11:39 +0100)]
rename variable wid -> dep

5 years agomake write latch sync in Function Unit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 10:19:47 +0000 (11:19 +0100)]
make write latch sync in Function Unit

5 years agoadd decode out of src1 and src2 pending from FnUnit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 09:52:19 +0000 (10:52 +0100)]
add decode out of src1 and src2 pending from FnUnit

5 years agoadd regfile array test
Luke Kenneth Casson Leighton [Wed, 8 May 2019 09:21:15 +0000 (10:21 +0100)]
add regfile array test

5 years agobegin debugging, temporary sync on issueunit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 08:21:04 +0000 (09:21 +0100)]
begin debugging, temporary sync on issueunit

5 years agostart on unit test
Luke Kenneth Casson Leighton [Wed, 8 May 2019 07:50:11 +0000 (08:50 +0100)]
start on unit test

5 years agoconnect up ALUs
Luke Kenneth Casson Leighton [Wed, 8 May 2019 07:24:07 +0000 (08:24 +0100)]
connect up ALUs

5 years agowhoops connect enable / data correct way round in regfilearray
Luke Kenneth Casson Leighton [Wed, 8 May 2019 07:23:57 +0000 (08:23 +0100)]
whoops connect enable / data correct way round in regfilearray

5 years agoadd computational unit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 07:22:49 +0000 (08:22 +0100)]
add computational unit

5 years agoadd register file connection
Luke Kenneth Casson Leighton [Wed, 8 May 2019 05:43:00 +0000 (06:43 +0100)]
add register file connection

5 years agoadd ORing of port inputs together
Luke Kenneth Casson Leighton [Wed, 8 May 2019 05:42:38 +0000 (06:42 +0100)]
add ORing of port inputs together

5 years agoconnect to integer global pending vectors
Luke Kenneth Casson Leighton [Wed, 8 May 2019 03:51:46 +0000 (04:51 +0100)]
connect to integer global pending vectors

5 years agoadd intpick connections
Luke Kenneth Casson Leighton [Wed, 8 May 2019 02:47:54 +0000 (03:47 +0100)]
add intpick connections

5 years agorename rel_req to req_rel
Luke Kenneth Casson Leighton [Wed, 8 May 2019 02:19:02 +0000 (03:19 +0100)]
rename rel_req to req_rel

5 years agoreplace go_read/go_write with go_rd/go_wr
Luke Kenneth Casson Leighton [Wed, 8 May 2019 02:12:49 +0000 (03:12 +0100)]
replace go_read/go_write with go_rd/go_wr

5 years agoconnect issue unit to function units
Luke Kenneth Casson Leighton [Wed, 8 May 2019 02:11:19 +0000 (03:11 +0100)]
connect issue unit to function units

5 years agostart wiring up issue unit
Luke Kenneth Casson Leighton [Wed, 8 May 2019 01:48:53 +0000 (02:48 +0100)]
start wiring up issue unit

5 years agoadd int fu-reg dep matrix
Luke Kenneth Casson Leighton [Wed, 8 May 2019 01:26:34 +0000 (02:26 +0100)]
add int fu-reg dep matrix

5 years agoadd names to read/write ports, add priority picker and other pieces
Luke Kenneth Casson Leighton [Wed, 8 May 2019 01:13:35 +0000 (02:13 +0100)]
add names to read/write ports, add priority picker and other pieces

5 years agobegin connecting units together
Luke Kenneth Casson Leighton [Wed, 8 May 2019 00:41:31 +0000 (01:41 +0100)]
begin connecting units together

5 years agoadd nmigen alu_hier to experiment
Luke Kenneth Casson Leighton [Tue, 7 May 2019 11:36:33 +0000 (12:36 +0100)]
add nmigen alu_hier to experiment

5 years agoadd a variant of a regfile that has individual read/write-enable lines
Luke Kenneth Casson Leighton [Tue, 7 May 2019 11:29:41 +0000 (12:29 +0100)]
add a variant of a regfile that has individual read/write-enable lines

5 years agoadd regfile.py
Luke Kenneth Casson Leighton [Tue, 7 May 2019 07:35:20 +0000 (08:35 +0100)]
add regfile.py

5 years agoupdate layout of test_helper.py
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:53:16 +0000 (06:53 +0100)]
update layout of test_helper.py

5 years ago simplify gitignore
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:51:45 +0000 (06:51 +0100)]
 simplify gitignore

5 years agoadd extra ignore files
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:51:00 +0000 (06:51 +0100)]
add extra ignore files

5 years agoadd IEEE754 FPU dependency
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:49:32 +0000 (06:49 +0100)]
add IEEE754 FPU dependency

5 years agoupdate setup.py (cookie-cut from ieee754fpu)
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:49:08 +0000 (06:49 +0100)]
update setup.py (cookie-cut from ieee754fpu)

5 years agoconvert test_address_encoder.py to nosetest3 compatibility
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:47:29 +0000 (06:47 +0100)]
convert test_address_encoder.py to nosetest3 compatibility

5 years agoadd __init__.py to scoreboard directory
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:45:10 +0000 (06:45 +0100)]
add __init__.py to scoreboard directory

5 years agoadd Makefile, setup.py, blank README and NEWS
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:44:13 +0000 (06:44 +0100)]
add Makefile, setup.py, blank README and NEWS

5 years agoreorg TLB src
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:42:28 +0000 (06:42 +0100)]
reorg TLB src

5 years agomove main python code to src directory
Luke Kenneth Casson Leighton [Tue, 7 May 2019 05:40:15 +0000 (06:40 +0100)]
move main python code to src directory

5 years agoadd scoreboard source (moving from ieee754fpu repo)
Luke Kenneth Casson Leighton [Tue, 7 May 2019 04:43:49 +0000 (05:43 +0100)]
add scoreboard source (moving from ieee754fpu repo)

5 years agoAdd test setup. It compiles
Daniel Benusovich [Sat, 4 May 2019 22:36:59 +0000 (15:36 -0700)]
Add test setup. It compiles

5 years agoAdd default platform
Daniel Benusovich [Sat, 4 May 2019 22:36:46 +0000 (15:36 -0700)]
Add default platform

5 years agoAdd plru test. Needs work.
Daniel Benusovich [Sat, 4 May 2019 20:49:13 +0000 (13:49 -0700)]
Add plru test. Needs work.

5 years agoMove files into correct folders within ariane
Daniel Benusovich [Sat, 4 May 2019 20:48:58 +0000 (13:48 -0700)]
Move files into correct folders within ariane

5 years agowhitespace
Luke Kenneth Casson Leighton [Fri, 26 Apr 2019 10:56:27 +0000 (11:56 +0100)]
whitespace

5 years agoadded comments in AddressEncoder.py
rishucoding [Fri, 26 Apr 2019 09:48:08 +0000 (15:18 +0530)]
added comments in AddressEncoder.py

5 years agoadd some use of new "Elaboratable"
Luke Kenneth Casson Leighton [Tue, 23 Apr 2019 08:35:08 +0000 (09:35 +0100)]
add some use of new "Elaboratable"

5 years agorename LFSR2 to LFSR in test_LFSR2.py
Luke Kenneth Casson Leighton [Tue, 23 Apr 2019 08:31:48 +0000 (09:31 +0100)]
rename LFSR2 to LFSR in test_LFSR2.py

5 years agoadd Elaboratable to LFSR2
Luke Kenneth Casson Leighton [Tue, 23 Apr 2019 08:30:06 +0000 (09:30 +0100)]
add Elaboratable to LFSR2

5 years agocomment about max_exponent, remove its use: use python slice [:-1]
Luke Kenneth Casson Leighton [Mon, 22 Apr 2019 20:58:26 +0000 (21:58 +0100)]
comment about max_exponent, remove its use: use python slice [:-1]
slice [:-1] is the python way to not need explicit length
it is already in self.state, so no need to do self.max_exponent-1
just use -1