| 2021-12-20 |
Luke Kenneth Casson... | more code-comments
|
commit | commitdiff | tree |
| 2021-12-20 |
Luke Kenneth Casson... | add RTPDE - Radit Tree Page Directory Entry - Record...
|
commit | commitdiff | tree |
| 2021-12-20 |
Luke Kenneth Casson... | add (and ues) PRTBL Record in MMU
|
commit | commitdiff | tree |
| 2021-12-20 |
Luke Kenneth Casson... | create PGTBL Record and use it in MMU page_table_idle
|
commit | commitdiff | tree |
| 2021-12-19 |
Luke Kenneth Casson... | add hard stop address in ifetch unit test, bit of a...
|
commit | commitdiff | tree |
| 2021-12-19 |
Luke Kenneth Casson... | set terminate if core terminate requested
|
commit | commitdiff | tree |
| 2021-12-19 |
Luke Kenneth Casson... | code-comments
|
commit | commitdiff | tree |
| 2021-12-19 |
Luke Kenneth Casson... | add DMI STOPADDR register and use it in HDLRunner to...
|
commit | commitdiff | tree |
| 2021-12-19 |
Luke Kenneth Casson... | break out when core is stopped in HDLRunner
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | add link to XICS bugreport
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | sort out reset signalling after tracking down Simulation...
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | add icache/dcache/mmu unit test for TestIssuer
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | get instructions to re-run in issuer after I-Cache...
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | forgot to connect up I-Cache to MMU
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | move connection of bus.stall in icache.py,
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | tidyup
|
commit | commitdiff | tree |
| 2021-12-18 |
Luke Kenneth Casson... | tlb_req_index is TLB_BITS long not TLB_SIZE
|
commit | commitdiff | tree |
| 2021-12-16 |
Luke Kenneth Casson... | whoops, a Simulation bug, dcache bus ack Signal needed...
|
commit | commitdiff | tree |
| 2021-12-16 |
Luke Kenneth Casson... | give names to MMU records
|
commit | commitdiff | tree |
| 2021-12-16 |
Luke Kenneth Casson... | set_mmu_spr was using the slow-SPR index for the regfile
|
commit | commitdiff | tree |
| 2021-12-16 |
Luke Kenneth Casson... | whoops remove duplicate code (cut/paste error) no harm...
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | remove more unneeded code
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | read MSR.PR and MSR.DR and update ICache priv/virt...
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | remove more of SVP64 from TestIssuerInternalInOrder
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | remove update of pc, msr and svstate from TestIssuerInOrder
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | move update of pc, msr and svstate into TestIssuerBase
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | comment-out TestIssuerInternalInorder for now
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | move alternative TestIssuerInternalInOrder to new file
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | split out common elaboratable code from TestIssuer,
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | big split-out of common functions in TestIssuer to...
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | simplifying / tidyup of TestIssuer to get CoreState
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | sort out MSR, read/write in same way as PC/SVSTATE...
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | whoops accidentally commented out setup of instructions
|
commit | commitdiff | tree |
| 2021-12-15 |
Luke Kenneth Casson... | get fetch_failed working with no MMU
|
commit | commitdiff | tree |
| 2021-12-14 |
Luke Kenneth Casson... | trying to get TestIssuer FSM to respond correctly to...
|
commit | commitdiff | tree |
| 2021-12-14 |
Luke Kenneth Casson... | get OP_FETCH_FAILED to respond/return an exception...
|
commit | commitdiff | tree |
| 2021-12-14 |
Luke Kenneth Casson... | update wb_get memory with instructions if required
|
commit | commitdiff | tree |
| 2021-12-14 |
Luke Kenneth Casson... | MMU LOOKUP for fetch failed, priv mode is inversion...
|
commit | commitdiff | tree |
| 2021-12-14 |
Luke Kenneth Casson... | link MSR.PR into MMU FSM OP_FETCH_FAILED
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | return temporarily to older version of pinmux submodule
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | request a flush of icache to clear the instruction...
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | fix test_loadstore1.py with MSR=PR/DR
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | set pr=0 because privileged mode is pr=0 not pr=1
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | add in missing MSRSpec import
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | commented-out code
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | fix up pr/dr/sf in PortInterfaceBase
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | pass in new MSRSpec to test_loadstore1.py not msr_pr=1
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | convert PortInterfaceBase to pass msr not msr_pr
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | convert LoadStore1 to new msr.pr/dr/sf
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | add msr to MMU Op Subset record
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | still have to import MSRSpec
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | connect up PortInterface priv_mode, virt_mode and mode_32bit
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | construct an MSRSpec in PortInterfaceBase (not used...
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | whoops wrong variable names
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | rename msr_pr to priv_mode in LDSTCompUnit
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | TODO comments about using MSRspec
|
commit | commitdiff | tree |
| 2021-12-13 |
Luke Kenneth Casson... | change PortInterface naming to msr not msr_pr in set_wr_addr
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | set and reset instruction fault so it does not occur...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | when an exception happens, if it is a fetch_failed...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | delay MMU LOOKUP done by one clock so that the exception...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | bring MMU exception out where AllFunctionUnits (and...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | bring exception out from MMU FSM, correct "done"
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | add LDSTException output to MMU
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | drat, a test inverting the instruction made it into...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | starting to hack in fetch failed (including OP_FETCH_FAILED)
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | print debugs established that when a wb_get memory...
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | set fetch_failed into PowerDecoder2 combinatorially
|
commit | commitdiff | tree |
| 2021-12-12 |
Luke Kenneth Casson... | in a terrible botched way, get at I-Cache and set it up
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | fix bug in unit test, forgot that wb_get mem dict is...
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | get FetchUnitInterface I-Cache test working (sort-of)
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | comment out broken test
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | whoops forgot to add pspec
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | add start of test_loadstore1_ifetch_unit_interface()
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | connect up I-Cache to FetchUnitInterface
|
commit | commitdiff | tree |
| 2021-12-11 |
Luke Kenneth Casson... | add new ConfigFetchUnit option "mmu_cache_wb" which...
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add some examination of the failed-fetched instruction
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add some debug string info to gtkwave
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | add I-Cache to FSM local variables
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | wire fetch_failed from I-Cache to PowerDecoder2
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | make icache accessible to core, working back to TestIssuer
|
commit | commitdiff | tree |
| 2021-12-09 |
Luke Kenneth Casson... | include SPR.TB in SPR FU
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | got fed up of staring at magic constants in the MMU
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add special pagetable to ifetch_invalid with execute...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | do not try priv_mode on the instruction fetch (not...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add an example pagetable where executable permission...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | check that no exception occurs in the virtual-memory...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add OP_FETCH_FAILED to MMU Function Unit
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | make LoadStore1 intsr_fault a "captured flag" - strictly...
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | remove MSR and add CIA to MMU Input Record
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add instr_fault to LoadStore1 FSM
|
commit | commitdiff | tree |
| 2021-12-08 |
Luke Kenneth Casson... | add new PortInterfaceBase external_busy() option
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | complete the i-cache fetch through the MMU, including...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | set separate "iside" signal in LoadStore1 to not confuse it
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | start extending icache loadstore test
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | whoops another serious error in the CacheTagArray
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add first i-cache fetch (non-virtual), no MMU lookup...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | code-comments
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add in I-Cache into LoadStore1 - presently unused ...
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | add discussion links and bugreport
|
commit | commitdiff | tree |
| 2021-12-07 |
Luke Kenneth Casson... | invert mmureq statements
|
commit | commitdiff | tree |
| next |
projects / soc.git / search