src/ieee754/fpdiv/div1.py

   1 """IEEE754 Floating Point Divider
   2
   3 Relevant bugreport: http://bugs.libre-riscv.org/show_bug.cgi?id=99
   4 """
   5
   6 from nmigen import Module, Signal, Cat, Elaboratable
   7 from nmigen.cli import main, verilog
   8
   9 from ieee754.fpcommon.fpbase import FPNumBaseRecord
  10 from ieee754.fpcommon.fpbase import FPState
  11 from ieee754.fpcommon.denorm import FPSCData
  12 from .div0 import FPDivStage0Data
  13
  14
  15 class FPDivStage1Mod(Elaboratable):
  16
  17     def __init__(self, width, id_wid):
  18         self.width = width
  19         self.id_wid = id_wid
  20         self.i = self.ispec()
  21         self.o = self.ospec()
  22
  23     def ispec(self):
  24         return FPDivStage0Data(self.width, self.id_wid)
  25
  26     def ospec(self):
  27         return FPDivStage0Data(self.width, self.id_wid)
  28
  29     def process(self, i):
  30         return self.o
  31
  32     def setup(self, m, i):
  33         """ links module to inputs and outputs
  34         """
  35         m.submodules.div0 = self
  36         m.d.comb += self.i.eq(i)
  37
  38     def elaborate(self, platform):
  39         m = Module()
  40
  41         # XXX TODO, actual DIV code here.  this class would be
  42         # "step two" and is the main "chain".  tons of these needed.
  43         # here is where Q and R are used, TODO: those are in FPDivStage0Data.
  44
  45         # store intermediate tests (and zero-extended mantissas)
  46         am0 = Signal(len(self.i.a.m)+1, reset_less=True)
  47         bm0 = Signal(len(self.i.b.m)+1, reset_less=True)
  48         m.d.comb += [
  49                      am0.eq(Cat(self.i.a.m, 0)),
  50                      bm0.eq(Cat(self.i.b.m, 0))
  51                     ]
  52         # same-sign (both negative or both positive) div mantissas
  53         with m.If(~self.i.out_do_z):
  54             m.d.comb += [self.o.z.e.eq(self.i.a.e + self.i.b.e + 1),
  55                          # TODO: no, not product, first stage Q and R etc. etc.
  56                          # go here.
  57                          self.o.product.eq(am0 * bm0 * 4),
  58                          self.o.z.s.eq(self.i.a.s ^ self.i.b.s)
  59                 ]
  60
  61         m.d.comb += self.o.oz.eq(self.i.oz)
  62         m.d.comb += self.o.out_do_z.eq(self.i.out_do_z)
  63         m.d.comb += self.o.mid.eq(self.i.mid)
  64         return m
  65