quick debug session on FP div stub pipeline
[ieee754fpu.git] / src / ieee754 / fpdiv / pipeline.py
1 # IEEE Floating Point Divider Pipeline
2
3 from nmigen import Module
4 from nmigen.cli import main, verilog
5
6 from nmutil.singlepipe import ControlBase
7 from nmutil.concurrentunit import ReservationStations, num_bits
8
9 from ieee754.fpcommon.getop import FPADDBaseData
10 from ieee754.fpcommon.denorm import FPSCData
11 from ieee754.fpcommon.pack import FPPackData
12 from ieee754.fpcommon.normtopack import FPNormToPack
13 from .specialcases import FPDIVSpecialCasesDeNorm
14 from .divstages import FPDivStages
15
16
17
18 class FPDIVBasePipe(ControlBase):
19 def __init__(self, width, id_wid):
20 ControlBase.__init__(self)
21 self.pipe1 = FPDIVSpecialCasesDeNorm(width, id_wid)
22 self.pipe2 = FPDivStages(width, id_wid)
23 self.pipe3 = FPNormToPack(width, id_wid)
24
25 self._eqs = self.connect([self.pipe1, self.pipe2, self.pipe3])
26
27 def elaborate(self, platform):
28 m = ControlBase.elaborate(self, platform)
29 m.submodules.scnorm = self.pipe1
30 m.submodules.divstages = self.pipe2
31 m.submodules.normpack = self.pipe3
32 m.d.comb += self._eqs
33 return m
34
35
36 class FPDIVMuxInOut(ReservationStations):
37 """ Reservation-Station version of FPDIV pipeline.
38
39 * fan-in on inputs (an array of FPADDBaseData: a,b,mid)
40 * N-stage divider pipeline
41 * fan-out on outputs (an array of FPPackData: z,mid)
42
43 Fan-in and Fan-out are combinatorial.
44 """
45 def __init__(self, width, num_rows):
46 self.width = width
47 self.id_wid = num_bits(width)
48 self.alu = FPDIVBasePipe(width, self.id_wid)
49 ReservationStations.__init__(self, num_rows)
50
51 def i_specfn(self):
52 return FPADDBaseData(self.width, self.id_wid)
53
54 def o_specfn(self):
55 return FPPackData(self.width, self.id_wid)