1 # IEEE Floating Point Multiplier
3 from nmigen
import Module
, Signal
, Cat
, Const
, Elaboratable
4 from nmigen
.cli
import main
, verilog
7 from ieee754
.fpcommon
.fpbase
import FPNumDecode
, FPNumBaseRecord
8 from nmutil
.singlepipe
import SimpleHandshake
, StageChain
10 from ieee754
.fpcommon
.fpbase
import FPState
, FPID
11 from ieee754
.fpcommon
.getop
import FPADDBaseData
12 from ieee754
.fpcommon
.denorm
import (FPSCData
, FPAddDeNormMod
)
13 from ieee754
.fpmul
.align
import FPAlignModSingle
16 class FPDIVSpecialCasesMod(Elaboratable
):
17 """ special cases: NaNs, infs, zeros, denormalised
18 see "Special Operations"
19 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
22 def __init__(self
, pspec
):
28 return FPADDBaseData(self
.pspec
)
31 return FPSCData(self
.pspec
, False)
33 def setup(self
, m
, i
):
34 """ links module to inputs and outputs
36 m
.submodules
.specialcases
= self
37 m
.d
.comb
+= self
.i
.eq(i
)
42 def elaborate(self
, platform
):
45 #m.submodules.sc_out_z = self.o.z
47 # decode: XXX really should move to separate stage
48 a1
= FPNumBaseRecord(self
.pspec
.width
, False)
49 b1
= FPNumBaseRecord(self
.pspec
.width
, False)
50 m
.submodules
.sc_decode_a
= a1
= FPNumDecode(None, a1
)
51 m
.submodules
.sc_decode_b
= b1
= FPNumDecode(None, b1
)
52 m
.d
.comb
+= [a1
.v
.eq(self
.i
.a
),
58 sabx
= Signal(reset_less
=True) # sign a xor b (sabx, get it?)
59 m
.d
.comb
+= sabx
.eq(a1
.s ^ b1
.s
)
61 abnan
= Signal(reset_less
=True)
62 m
.d
.comb
+= abnan
.eq(a1
.is_nan | b1
.is_nan
)
64 abinf
= Signal(reset_less
=True)
65 m
.d
.comb
+= abinf
.eq(a1
.is_inf
& b1
.is_inf
)
67 with m
.If(self
.i
.ctx
.op
== 0): # DIV
68 # if a is NaN or b is NaN return NaN
70 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
71 m
.d
.comb
+= self
.o
.z
.nan(0)
73 # if a is inf and b is Inf return NaN
75 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
76 m
.d
.comb
+= self
.o
.z
.nan(0)
78 # if a is inf return inf
79 with m
.Elif(a1
.is_inf
):
80 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
81 m
.d
.comb
+= self
.o
.z
.inf(sabx
)
83 # if b is inf return zero
84 with m
.Elif(b1
.is_inf
):
85 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
86 m
.d
.comb
+= self
.o
.z
.zero(sabx
)
88 # if a is zero return zero (or NaN if b is zero)
89 with m
.Elif(a1
.is_zero
):
90 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
91 m
.d
.comb
+= self
.o
.z
.zero(sabx
)
92 # b is zero return NaN
93 with m
.If(b1
.is_zero
):
94 m
.d
.comb
+= self
.o
.z
.nan(0)
96 # if b is zero return Inf
97 with m
.Elif(b1
.is_zero
):
98 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
99 m
.d
.comb
+= self
.o
.z
.inf(sabx
)
101 # Denormalised Number checks next, so pass a/b data through
103 m
.d
.comb
+= self
.o
.out_do_z
.eq(0)
105 with m
.If(self
.i
.ctx
.op
== 1): # SQRT
109 m
.d
.comb
+= self
.o
.out_do_z
.eq(1)
110 m
.d
.comb
+= self
.o
.z
.nan(0)
111 # Denormalised Number checks next, so pass a/b data through
113 m
.d
.comb
+= self
.o
.out_do_z
.eq(0)
116 m
.d
.comb
+= self
.o
.oz
.eq(self
.o
.z
.v
)
117 m
.d
.comb
+= self
.o
.ctx
.eq(self
.i
.ctx
)
122 class FPDIVSpecialCases(FPState
):
123 """ special cases: NaNs, infs, zeros, denormalised
124 NOTE: some of these are unique to div. see "Special Operations"
125 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
128 def __init__(self
, pspec
):
129 FPState
.__init
__(self
, "special_cases")
130 self
.mod
= FPDIVSpecialCasesMod(pspec
)
131 self
.out_z
= self
.mod
.ospec()
132 self
.out_do_z
= Signal(reset_less
=True)
134 def setup(self
, m
, i
):
135 """ links module to inputs and outputs
137 self
.mod
.setup(m
, i
, self
.out_do_z
)
138 m
.d
.sync
+= self
.out_z
.v
.eq(self
.mod
.out_z
.v
) # only take the output
139 m
.d
.sync
+= self
.out_z
.mid
.eq(self
.mod
.o
.mid
) # (and mid)
143 with m
.If(self
.out_do_z
):
146 m
.next
= "denormalise"
149 class FPDIVSpecialCasesDeNorm(FPState
, SimpleHandshake
):
150 """ special cases: NaNs, infs, zeros, denormalised
153 def __init__(self
, pspec
):
154 FPState
.__init
__(self
, "special_cases")
156 SimpleHandshake
.__init
__(self
, self
) # pipe is its own stage
157 self
.out
= self
.ospec()
160 return FPADDBaseData(self
.pspec
) # SpecialCases ispec
163 return FPSCData(self
.pspec
, False) # Align ospec
165 def setup(self
, m
, i
):
166 """ links module to inputs and outputs
168 smod
= FPDIVSpecialCasesMod(self
.pspec
)
169 dmod
= FPAddDeNormMod(self
.pspec
, False)
170 amod
= FPAlignModSingle(self
.pspec
, False)
172 chain
= StageChain([smod
, dmod
, amod
])
175 # only needed for break-out (early-out)
176 # self.out_do_z = smod.o.out_do_z
180 def process(self
, i
):
184 # for break-out (early-out)
185 #with m.If(self.out_do_z):
188 m
.d
.sync
+= self
.out
.eq(self
.process(None))