copy context/roundz, a and b manually in fpmul align
[ieee754fpu.git] / src / ieee754 / fpmul / mulstages.py
1 # IEEE Floating Point Multiplier
2
3 from nmigen import Module
4 from nmigen.cli import main, verilog
5
6 from nmutil.singlepipe import (StageChain, SimpleHandshake)
7
8 from ieee754.fpcommon.fpbase import FPState
9 from ieee754.fpcommon.denorm import FPSCData
10 from ieee754.fpcommon.postcalc import FPAddStage1Data
11 from .mul0 import FPMulStage0Mod
12 from .mul1 import FPMulStage1Mod
13
14
15 class FPMulStages(FPState, SimpleHandshake):
16
17 def __init__(self, pspec):
18 FPState.__init__(self, "align")
19 self.pspec = pspec
20 SimpleHandshake.__init__(self, self) # pipeline is its own stage
21 self.m1o = self.ospec()
22
23 def ispec(self):
24 return FPSCData(self.pspec, False)
25
26 def ospec(self):
27 return FPAddStage1Data(self.pspec)
28
29 def setup(self, m, i):
30 """ links module to inputs and outputs
31 """
32
33 # chain MulStage0 and MulStage1
34 m0mod = FPMulStage0Mod(self.pspec)
35 m1mod = FPMulStage1Mod(self.pspec)
36
37 chain = StageChain([m0mod, m1mod])
38 chain.setup(m, i)
39
40 self.o = m1mod.o
41
42 def process(self, i):
43 return self.o
44
45 def action(self, m):
46 m.d.sync += self.m1o.eq(self.process(None))
47 m.next = "normalise_1"
48
49