copy context/roundz, a and b manually in fpmul align
[ieee754fpu.git] / src / ieee754 / fpmul / specialcases.py
1 # IEEE Floating Point Multiplier
2
3 from nmigen import Module, Signal, Cat, Const, Elaboratable
4 from nmigen.cli import main, verilog
5 from math import log
6
7 from ieee754.fpcommon.fpbase import FPNumDecode, FPNumBaseRecord
8 from nmutil.singlepipe import SimpleHandshake, StageChain
9
10 from ieee754.fpcommon.fpbase import FPState, FPID
11 from ieee754.fpcommon.getop import FPADDBaseData
12 from ieee754.fpcommon.denorm import (FPSCData, FPAddDeNormMod)
13 from ieee754.fpmul.align import FPAlignModSingle
14
15
16 class FPMulSpecialCasesMod(Elaboratable):
17 """ special cases: NaNs, infs, zeros, denormalised
18 see "Special Operations"
19 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
20 """
21
22 def __init__(self, pspec):
23 self.pspec = pspec
24 self.i = self.ispec()
25 self.o = self.ospec()
26
27 def ispec(self):
28 return FPADDBaseData(self.pspec)
29
30 def ospec(self):
31 return FPSCData(self.pspec, False)
32
33 def setup(self, m, i):
34 """ links module to inputs and outputs
35 """
36 m.submodules.specialcases = self
37 m.d.comb += self.i.eq(i)
38
39 def process(self, i):
40 return self.o
41
42 def elaborate(self, platform):
43 m = Module()
44
45 #m.submodules.sc_out_z = self.o.z
46
47 # decode: XXX really should move to separate stage
48 width = self.pspec.width
49 a1 = FPNumBaseRecord(width, False)
50 b1 = FPNumBaseRecord(width, False)
51 m.submodules.sc_decode_a = a1 = FPNumDecode(None, a1)
52 m.submodules.sc_decode_b = b1 = FPNumDecode(None, b1)
53 m.d.comb += [a1.v.eq(self.i.a),
54 b1.v.eq(self.i.b),
55 self.o.a.eq(a1),
56 self.o.b.eq(b1)
57 ]
58
59 obz = Signal(reset_less=True)
60 m.d.comb += obz.eq(a1.is_zero | b1.is_zero)
61
62 sabx = Signal(reset_less=True) # sign a xor b (sabx, get it?)
63 m.d.comb += sabx.eq(a1.s ^ b1.s)
64
65 abnan = Signal(reset_less=True)
66 m.d.comb += abnan.eq(a1.is_nan | b1.is_nan)
67
68 # if a is NaN or b is NaN return NaN
69 with m.If(abnan):
70 m.d.comb += self.o.out_do_z.eq(1)
71 m.d.comb += self.o.z.nan(0)
72
73 # if a is inf return inf (or NaN)
74 with m.Elif(a1.is_inf):
75 m.d.comb += self.o.out_do_z.eq(1)
76 m.d.comb += self.o.z.inf(sabx)
77 # b is zero return NaN
78 with m.If(b1.is_zero):
79 m.d.comb += self.o.z.nan(0)
80
81 # if b is inf return inf (or NaN)
82 with m.Elif(b1.is_inf):
83 m.d.comb += self.o.out_do_z.eq(1)
84 m.d.comb += self.o.z.inf(sabx)
85 # a is zero return NaN
86 with m.If(a1.is_zero):
87 m.d.comb += self.o.z.nan(0)
88
89 # if a is zero or b zero return signed-a/b
90 with m.Elif(obz):
91 m.d.comb += self.o.out_do_z.eq(1)
92 m.d.comb += self.o.z.zero(sabx)
93
94 # Denormalised Number checks next, so pass a/b data through
95 with m.Else():
96 m.d.comb += self.o.out_do_z.eq(0)
97
98 m.d.comb += self.o.oz.eq(self.o.z.v)
99 m.d.comb += self.o.ctx.eq(self.i.ctx)
100
101 return m
102
103
104 class FPMulSpecialCases(FPState):
105 """ special cases: NaNs, infs, zeros, denormalised
106 NOTE: some of these are unique to add. see "Special Operations"
107 https://steve.hollasch.net/cgindex/coding/ieeefloat.html
108 """
109
110 def __init__(self, width, id_wid):
111 FPState.__init__(self, "special_cases")
112 self.mod = FPMulSpecialCasesMod(width)
113 self.out_z = self.mod.ospec()
114 self.out_do_z = Signal(reset_less=True)
115
116 def setup(self, m, i):
117 """ links module to inputs and outputs
118 """
119 self.mod.setup(m, i, self.out_do_z)
120 m.d.sync += self.out_z.v.eq(self.mod.out_z.v) # only take the output
121 m.d.sync += self.out_z.ctx.eq(self.mod.o.ctx) # (and context)
122
123 def action(self, m):
124 self.idsync(m)
125 with m.If(self.out_do_z):
126 m.next = "put_z"
127 with m.Else():
128 m.next = "denormalise"
129
130
131 class FPMulSpecialCasesDeNorm(FPState, SimpleHandshake):
132 """ special cases: NaNs, infs, zeros, denormalised
133 """
134
135 def __init__(self, pspec):
136 FPState.__init__(self, "special_cases")
137 self.pspec = pspec
138 SimpleHandshake.__init__(self, self) # pipe is its own stage
139 self.out = self.ospec()
140
141 def ispec(self):
142 return FPADDBaseData(self.pspec)
143
144 def ospec(self):
145 return FPSCData(self.pspec, False)
146
147 def setup(self, m, i):
148 """ links module to inputs and outputs
149 """
150 smod = FPMulSpecialCasesMod(self.pspec)
151 dmod = FPAddDeNormMod(self.pspec, False)
152 amod = FPAlignModSingle(self.pspec, False)
153
154 chain = StageChain([smod, dmod, amod])
155 chain.setup(m, i)
156
157 # only needed for break-out (early-out)
158 # self.out_do_z = smod.o.out_do_z
159
160 self.o = amod.o # output is from last .o in the chain
161
162 def process(self, i):
163 return self.o
164
165 def action(self, m):
166 # for break-out (early-out)
167 #with m.If(self.out_do_z):
168 # m.next = "put_z"
169 #with m.Else():
170 m.d.sync += self.out.eq(self.process(None))
171 m.next = "align"
172
173