1 # SPDX-License-Identifier: LGPL-2.1-or-later
2 # See Notices.txt for copyright information
5 Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
7 dynamically-partitionable "xor" class, directly equivalent
8 to Signal.xor() except SIMD-partitionable
12 * http://libre-riscv.org/3d_gpu/architecture/dynamic_simd/logicops
13 * http://bugs.libre-riscv.org/show_bug.cgi?id=176
16 from nmigen
import Signal
, Module
, Elaboratable
, Cat
, C
, Mux
, Repl
17 from nmigen
.cli
import main
18 from nmutil
.ripple
import RippleLSB
20 from ieee754
.part_mul_add
.partpoints
import PartitionPoints
21 from ieee754
.part_cmp
.experiments
.eq_combiner
import XORCombiner
24 class PartitionedXOR(Elaboratable
):
26 def __init__(self
, width
, partition_points
):
27 """Create a ``PartitionedXOR`` operator
30 self
.a
= Signal(width
, reset_less
=True)
31 self
.partition_points
= PartitionPoints(partition_points
)
32 self
.mwidth
= len(self
.partition_points
)+1
33 self
.output
= Signal(self
.mwidth
, reset_less
=True)
34 if not self
.partition_points
.fits_in_width(width
):
35 raise ValueError("partition_points doesn't fit in width")
37 def elaborate(self
, platform
):
40 m
.submodules
.xorc
= xorc
= XORCombiner(self
.mwidth
)
42 # make a series of "xor", splitting a and b into partition chunks
43 xors
= Signal(self
.mwidth
, reset_less
=True)
45 keys
= list(self
.partition_points
.keys()) + [self
.width
]
47 for i
in range(len(keys
)):
49 xorl
.append(self
.a
[start
:end
].xor())
50 start
= end
# for next time round loop
51 comb
+= xors
.eq(Cat(*xorl
))
53 # put the partial results through the combiner
54 comb
+= xorc
.gates
.eq(self
.partition_points
.as_sig())
55 comb
+= xorc
.neqs
.eq(xors
)
57 m
.submodules
.ripple
= ripple
= RippleLSB(self
.mwidth
)
58 comb
+= ripple
.results_in
.eq(xorc
.outputs
)
59 comb
+= ripple
.gates
.eq(self
.partition_points
.as_sig())
60 comb
+= self
.output
.eq(~ripple
.output
)