3d_gpu.mdwn

   1 # RISC-V 3D GPU / CPU / VPU
   2
   3 Creating a trustworthy processor for the world.
   4
   5 Note: this is a **hybrid** CPU, VPU and GPU.  It is not, as many news articles
   6 are implying, a "dedicated exclusive GPU".  The option exists to *create*
   7 a stand-alone GPU product (contact us if this is a product that you want).
   8 Our primary goal is to design a **complete** all-in-one processor
   9 (System-on-a-Chip) that happens to include libre-licensed VPU and GPU
  10 accelerated instructions as part of the actual - main - CPU itself.
  11
  12 We seek investors, sponsors (whose contributions thanks to NLNet may be
  13 tax-deductible), engineers and potential customers, who are
  14 interested, as a first product, in the creation and use of an entirely
  15 libre low-power mobile class system-on-a-chip.  Comparative benchmark
  16 performance, pincount and price is the Allwinner A64, except that the
  17 power budget target is 2.5 watts in a 16x16mm 320 to 360 pin 0.8mm
  18 FBGA package.  Instead of single-issue higher clock rate, the design is
  19 multi-issue, aiming for around 800mhz.
  20
  21 The lower pincount, lower power, and higher BGA pitch is all to reduce
  22 the cost of product development when it comes to PCB design and layout:
  23
  24 * Above 4 watts requires metal packages, greater attention to thermal
  25   management in the PCB design and layout, and much pricier PMICs.
  26 * 0.6mm pitch BGA and below requires much more expensive PCB manufacturing
  27   equipment and more costly PCBA techniques.
  28 * Above 600 pins begins to reduce production yields as well as increase
  29   the cost of testing and packaging.
  30
  31 We can look at larger higher-power ASICs either later or, if funding
  32 is made available, immediately.
  33
  34 Recent applications to NLNet (Oct 2019) are for a test chip in 180nm,
  35 64 bit, single core dual issue, around 300 to 350mhz.  This will provide
  36 the confidence to go to higher geometries, as well as be a commercially
  37 viable embedded product in its own right.
  38
  39 # Business Objectives
  40
  41 See [[3d_gpu/business_objectives]]
  42
  43 # Links:
  44
  45 * [[shakti/m_class/libre_3d_gpu]]
  46 * [[discussion]]
  47 * [[resources]]
  48 * [[overview]]
  49 * [[3d_gpu/funding]]
  50 * [[3d_gpu/architecture]]
  51 * Founding [[charter]]
  52 * Mailing list <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/>
  53 * Crowdsupply page <https://www.crowdsupply.com/libre-risc-v/m-class>
  54 * Wiki <https://libre-riscv.org>
  55 * Git repositories <https://git.libre-riscv.org>
  56 * Bugtracker <http://bugs.libre-riscv.org>
  57 * Kazan Vulkan Driver (including 3D engine) <https://salsa.debian.org/Kazan-team/kazan>
  58 * [NLNet 2019 Milestones](http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02)
  59 * NLNet Project Page <https://nlnet.nl/project/Libre-RISCV/>
  60 * [[nlnet_proposals]]
  61 * [[llvm]]
  62
  63 # Progress:
  64
  65 * Feb 2020: OpenPower Foundation EULA released.
  66 * Jan 2020: New team members, Yehowshua and Michael.  Last-minute attendance of FOSDEM2020
  67 * Dec 2019: Second round NLNet questions answered.  External Review completed.  6 NLNet proposals accepted (EUR 200,000+)
  68 * Nov 2019: Alternative FP library to Berkeley softfloat developed. NLNet first round questions answered.
  69 * Oct 2019: 3D Standards continued.  POWER ISA considered.  Open 3D Alliance begins.  NLNet funding applications submitted.
  70 * Sep 2019: 3D Standards continued.  Additional NLNet Funding proposals discussed.
  71 * Aug 2019: Development of "Transcendentals" (SIN/COS/ATAN2) Specifications
  72 * Jul 2019: Sponsorship from Purism received.  IEEE754 FP Mul, Add, DIV,
  73   FCLASS and FCVT pipelines completed.
  74 * Jun 2019: IEEE754 FP Mul, Add, and FSM "DIV" completed.
  75 * May 2019: 6600-style scoreboard started
  76 * Apr 2019: NLnet funding approved by independent review committee
  77 * Mar 2019: NLnet funding application first and second phase passed
  78 * Mar 2019: First successful nmigen pipeline milestone achieved with IEEE754 FADD
  79 * Feb 2019: Conversion of John Dawson's IEEE754 FPU to nmigen started
  80 * Jan 2019: Second version Simple-V preliminary proposal (suited to LLVM)
  81 * 2017 - Nov 2018: Simple-V specification preliminary draft completed
  82 * Aug 2018 - Nov 2018: spike-sv implementation of draft spec completed
  83 * Aug 2018: Kazan Vulkan Driver initiated
  84 * Sep 2018: mailing list established
  85 * Sep 2018: Crowdsupply pre-launch page up (for updates)
  86 * Dec 2018: preliminary floorplan and architecture designed (comp.arch)
  87
  88 # News Articles
  89
  90 * <https://www.phoronix.com/forums/forum/hardware/processors-memory/1133806-libre-risc-v-open-source-effort-now-looking-at-power-instead-of-risc-v/page7>
  91 * <https://hub.packtpub.com/a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
  92 * <https://riscv.org/2018/10/packt-hub-article-a-libre-gpu-effort-based-on-risc-v-rust-llvm-and-vulkan-by-the-developer-of-an-earth-friendly-computer/>
  93 * <https://www.reddit.com/r/RISCV/comments/9jts9t/theres_a_new_libre_gpu_effort_building_on_riscv/>
  94 * <https://www.linux.com/blog/2018/11/risc-v-linux-development-full-swing>
  95 * <https://www.phoronix.com/scan.php?page=news_item&px=Libre-GPU-RISC-V-Vulkan>
  96 * <https://www.heise.de/newsticker/meldung/Mobilprozessor-mit-freier-GPU-Libre-RISC-V-M-Class-geplant-4242802.html>
  97 * <https://news.ycombinator.com/item?id=18094734>
  98 * <http://www.tuxmachines.org/node/116004>
  99 * <https://linuxfr.org/users/martoni/journaux/risc-v-est-pret-pour-le-desktop>
 100 * <https://www.reddit.com/r/hardware/comments/9jlby1/theres_a_new_libre_gpu_effort_building_on_riscv/>
 101 * <http://www.eevblog.com/forum/crowd-funded-projects/libre-risc-v-m-class-with-open-source-gpu-and-kazan-vulkan-driver/>
 102 * <https://www.reddit.com/domain/libre-riscv.org/>
 103 * <https://hardware.slashdot.org/comments.pl?sid=13447940&cid=58160868>
 104 * <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1080755-libre-risc-v-gpu-aiming-for-2-5-watt-power-draw-continues-being-plotted/page5>
 105 * <https://www.phoronix.com/forums/forum/hardware/processors-memory/1070828-more-details-on-the-proposed-simple-v-extension-to-risc-v-for-gpu-workloads>
 106 * <https://slashdot.org/submission/9750302/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
 107 * <https://hardware.slashdot.org/story/19/06/02/0153243/nlnet-funds-development-of-a-libre-risc-v-3d-cpu>
 108 * <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1104124-libre-risc-v-snags-50k-eur-grant-to-work-on-its-risc-v-3d-gpu-chip/page6>
 109 * <https://news.ycombinator.com/item?id=21112341>
 110 * <https://www.reddit.com/r/RISCV/comments/db04j3/libreriscv_3d_cpugpu_seeks_grants_for_ambitious/>
 111 * <https://hardware.slashdot.org/story/19/09/29/1845252/libre-risc-v-3d-cpugpu-seeks-grants-for-ambitious-expansion>
 112 * <https://forums.puri.sm/t/risc-v-m-class-effort-and-purism-donation/6528/15>
 113 * Dec 2019 ProLinux <https://www.pro-linux.de/news/1/27527/comm/1/show-all-comments.html>
 114 * Dec 2019 Phoronix <https://www.phoronix.com/forums/forum/hardware/graphics-cards/1148553-libre-risc-v-accelerator-secures-300k-eur-in-grants-still-undecided-about-the-isa/>
 115 * Feb 15 2020 Phoronix <https://www.phoronix.com/scan.php?page=news_item&px=OpenPOWER-ISA-EULA-Draft/>
 116 * Feb 15 2020 Slashdot OpenPOWER article <https://news.slashdot.org/story/20/02/16/1743222/openpower-foundation-releases-eula-for-power-isa>
 117
 118 # Information Resources and Tutorials
 119
 120 * Fundamentals to learn to get started [[3d_gpu/tutorial]]
 121 * <https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers>
 122 * <https://jeffrey.co.in/blog/2014/01/d-flip-flop-using-migen/>
 123 * <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-March/000705.html>
 124 * <https://chisel.eecs.berkeley.edu/api/latest/chisel3/util/DecoupledIO.html>
 125 * <http://www.clifford.at/papers/2016/yosys-synth-formal/slides.pdf>
 126 * <http://blog.lambdaconcept.com/doku.php?id=migen:tutorial>
 127 * <http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu>
 128 * <https://chips4makers.io/blog/>
 129 * <https://hackaday.io/project/7817-zynqberry>
 130 * <https://wiki.f-si.org/index.php/FSiC2019>
 131 * <https://github.com/efabless/raven-picorv32> - <https://efabless.com>
 132 * <https://efabless.com/design_catalog/default>
 133 * <https://toyota-ai.ventures/>
 134 * <https://github.com/lambdaconcept/minerva>
 135 * <https://en.wikipedia.org/wiki/Liskov_substitution_principle>
 136 * <https://en.wikipedia.org/wiki/Principle_of_least_astonishment>
 137 * <https://peertube.f-si.org/videos/watch/379ef007-40b7-4a51-ba1a-0db4f48e8b16>
 138 * <https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md>
 139 * <https://mshahrad.github.io/openpiton-asplos16.html>
 140 * <https://wiki.f-si.org/index.php/The_Raven_chip:_First-time_silicon_success_with_qflow_and_efabless>
 141 * <http://smallcultfollowing.com/babysteps/blog/2019/04/19/aic-adventures-in-consensus/>
 142 * <http://www.crnhq.org/12-Skills-Summary.aspx?rw=c>
 143 * <http://bugs.libre-riscv.org/buglist.cgi?columnlist=assigned_to%2Cbug_status%2Cresolution%2Cshort_desc%2Ccf_budget&f1=cf_nlnet_milestone&o1=equals&query_format=advanced&resolution=---&v1=NLnet.2019.02>
 144 * <https://pdfs.semanticscholar.org/5060/4e9aff0e37089c4ab9a376c3f35761ffe28b.pdf>
 145 * <http://www.acsel-lab.com/arithmetic/arith15/papers/ARITH15_Takagi.pdf>
 146 * <https://youtu.be/o5Ihqg72T3c>
 147 * <http://flopoco.gforge.inria.fr/>
 148 * Fundamentals of Modern VLSI Devices <https://groups.google.com/a/groups.riscv.org/d/msg/hw-dev/b4pPvlzBzu0/7hDfxArEAgAJ>
 149
 150 # Analog Simulation
 151
 152 * <https://github.com/Isotel/mixedsim>
 153 * <http://www.vlsiacademy.org/open-source-cad-tools.html>
 154 * <http://ngspice.sourceforge.net/adms.html>
 155 * <https://en.wikipedia.org/wiki/Verilog-AMS#Open_Source_Implementations>
 156
 157 # Evaluations
 158
 159 * [[openpower]]