add interrupt handling section
[libreriscv.git] / interrupts.mdwn
1 # Interrupt Handling for RISC-V
2
3 This page is a non-authoritative resource for information and documentation
4 about interrupt handling on RISC-V. An interim page for the discussion
5 of interrupt handling is here: [[interrupt_handling]].
6
7 # Open PLIC Implementations
8
9 * <https://github.com/RoaLogic/plic> - written in verilog, has an
10 AHB3-Lite / AMBA interface. Documentation is here:
11 <https://github.com/RoaLogic/plic/blob/master/DATASHEET.md>
12 * Shakti Peripherals, there is a tested (taped-out) version here
13 in src/peripherals/plic <https://bitbucket.org/casl/c-class/src/>
14 and another version with up to 1024 IRQ lines and a 2-cycle
15 response time here <http://git.libre-riscv.org/?p=shakti-peripherals.git;a=tree;f=src/peripherals/plic>