bug 1034: update spec page on bin/tern lut2/lut3
[libreriscv.git] / openpower / sv / tern_bin.mdwn
1
2
3 <!-- hide -->
4 * <https://bugs.libre-soc.org/show_bug.cgi?id=1034> design/implement crfternlogi binlut etc.
5 * <https://bugs.libre-soc.org/show_bug.cgi?id=1023> regfile analysis
6 * <https://bugs.libre-soc.org/show_bug.cgi?id=1017> ls007 RFC
7 <!-- show -->
8
9
10 ## GPR Ternary Logic Immediate
11
12 Add this section to Book I 3.3.13
13
14 TLI-form
15
16 TLI 0.5 | 6.10 | 11.15 | 16.20 | 21.28 | 29.30 | 31 | Form |
17 |-------|------|-------|-------|-------|-------|----|----------|
18 | PO | RT | RA | RB | TLI | XO | Rc | TLI-Form |
19
20 * `ternlogi RT, RA, RB, TLI` (`Rc=0`)
21 * `ternlogi. RT, RA, RB, TLI` (`Rc=1`)
22
23 Pseudocode:
24
25 ```
26 result <- (~RT & ~RA & ~RB & TLI[0]*64) | # 64 copies of TLI[0]
27 (~RT & ~RA & RB & TLI[1]*64) | # ...
28 (~RT & RA & ~RB & TLI[2]*64) |
29 (~RT & RA & RB & TLI[3]*64) |
30 ( RT & ~RA & ~RB & TLI[4]*64) |
31 ( RT & ~RA & RB & TLI[5]*64) |
32 ( RT & RA & ~RB & TLI[6]*64) | # ...
33 ( RT & RA & RB & TLI[7]*64) # 64 copies of TLI[7]
34 RT <- result
35 ```
36
37 For each integer value i, 0 to 63, do the following.
38
39 ```
40 Let j be the value of the concatenation of the
41 contents of bit i of RT, bit i of RB, bit i of RT.
42 The value of bit j of TLI is placed into bit i of RT.
43
44 See Table 145, "xxeval(A, B, C, TLI) Equivalent
45 Functions," on page 968 for the equivalent function
46 evaluated by this instruction for any given value of TLI.
47 ```
48
49 *Programmer's Note: this is a Read-Modify-Write instruction on RT.
50 A simple copy instruction may be used to achieve the effect of
51 3-in 1-out. The copy instruction should come immediately before
52 `ternlogi` so that hardware may optionally Macro-Op Fuse them*
53
54 *Programmer's note: This instruction is useful when combined with Matrix REMAP
55 in "Inner Product" Mode, creating Warshall Transitive Closure that has many
56 applications in Computer Science.*
57
58 Special registers altered:
59
60 ```
61 CR0 (if Rc=1)
62 ```
63
64 ----------
65
66 \newpage{}
67
68 ## Condition Register Field Ternary Logic Immediate
69
70 Add this section to Book I 2.5.1
71
72 CRB-form
73
74 | 0.5|6.8 |9.10|11.13|14.15|16.18|19.25|26.30| 31| Form |
75 |----|----|----|-----|-----|-----|-----|-----|---|----------|
76 | PO | BF | msk|BFA | msk | BFB | TLI | XO |TLI| CRB-Form |
77
78 * `crfternlogi BF, BFA, BFB, TLI, msk`
79
80 Pseudocode:
81
82 ```
83 a <- CR[4*BF+32:4*BF+35]
84 b <- CR[4*BFA+32:4*BFA+35]
85 c <- CR[4*BFB+32:4*BFB+35]
86 ternary <- (~a & ~b & ~c & TLI[0]*4) | # 4 copies of TLI[0]
87 (~a & ~b & c & TLI[1]*4) | # 4 copies of TLI[1]
88 (~a & b & ~c & TLI[2]*4) | # ...
89 (~a & b & c & TLI[3]*4) |
90 ( a & ~b & ~c & TLI[4]*4) |
91 ( a & ~b & c & TLI[5]*4) |
92 ( a & b & ~c & TLI[6]*4) | # ...
93 ( a & b & c & TLI[7]*4)) # 4 copies of TLI[7]
94 do i = 0 to 3
95 if msk[i] = 1 then
96 CR[4*BF+32+i] <- ternary[i]
97 ```
98
99 For each integer value i, 0 to 3, do the following.
100
101 ```
102 Let j be the value of the concatenation of the
103 contents of bit i of CR Field BF, bit i of CR Field BFA,
104 bit i of CR Field BFB.
105
106 If bit i of msk is set to 1 then the value of bit j of TLI
107 is placed into bit i of CR Field BF.
108
109 Otherwise, if bit i of msk is a zero then bit i of
110 CR Field BF is unchanged.
111
112 See Table 145, "xxeval(A, B, C, TLI) Equivalent
113 Functions," on page 968 for the equivalent function
114 evaluated by this instruction for any given value of TLI.
115 ```
116
117 If `msk` is zero an Illegal Instruction trap is raised.
118
119 *Programmer's Note: this instruction is a "masked" overwrite on CR Field
120 BF. For each bit set in msk a Write is performed but for each bit clear
121 in msk the corresponding bit of BF is preserved. Overall this makes
122 crbinlog a conditionally Read-Modify-Write instruction on CR Field BF.
123 A simple copy instruction may be used to achieve the effect of
124 3-in 1-out. The copy instruction should come immediately before
125 `crternlogi` so that hardware may optionally Macro-Op Fuse them*
126
127 Special registers altered:
128
129 ```
130 CR field BF
131 ```
132
133 ----------
134
135 \newpage{}
136
137 ## Condition Register Ternary Logic Immediate
138
139 Add this section to Book I 2.5.1
140
141 TLI-form
142
143 TLI 0.5 | 6.10 | 11.15 | 16.20 | 21.28 | 29.31 | Form |
144 |-------|------|-------|-------|-------|-------|----------|
145 | PO | BT | BA | BB | TLI | XO | TLI-Form |
146
147 * `crternlogi BT, BA, BB, TLI`
148
149 Pseudocode:
150
151 ```
152 idx <- CR[BT+32] || CR[BA+32] || CR[BB+32]
153 CR[4*BT+32] <- TLI[7-idx]
154 ```
155
156 Special registers altered:
157
158 ```
159 CR[BT+32]
160 ```
161
162 ----------
163
164 \newpage{}
165
166 ## GPR Dynamic Binary Logic
167
168 Add this section to Book I 3.3.13
169
170 BM2-form
171
172 | 0-5 | 6-10 | 11-15 | 16-20 | 21-25 | 26 | 27-31 | Form |
173 |-----|------|-------|-------|-------|----|-------|---------|
174 | PO | RT | RA | RB | RC | nh | XO | VA-Form |
175
176 * `binlog RT, RA, RB, RC, nh`
177
178 Pseudocode:
179
180 ```
181 if nh = 1 then lut <- (RC)[56:59]
182 else lut <- (RC)[60:63]
183 result <- (~RA & ~RB & lut[0]*64) |
184 (~RA & RB & lut[1]*64) |
185 ( RA & ~RB & lut[2]*64) |
186 ( RA & RB & lut[3]*64))
187 RT <- result
188 ```
189
190 For each integer value i, 0 to 63, do the following.
191
192 ```
193 If nh contains a 0, let lut be the four LSBs of RC
194 (bits 60 to 63). Otherwise let lut be the next
195 four LSBs of RC (bits 56 to 59).
196
197 Let j be the value of the concatenation of the
198 contents of bit i of RT with bit i of RB.
199
200 The value of bit j of lut is placed into bit i of RT.
201 ```
202
203 Special registers altered:
204
205 ```
206 None
207 ```
208
209 **Programmer's Note**:
210
211 Dynamic (non-immediate-based) Ternary Logic, suitable for FPGA-style LUT3
212 dynamic lookups and for JIT runtime acceleration, may be emulated by
213 appropriate combination of `binlog` and `ternlogi`, using the `nh`
214 (next half) operand to select first and second nibble:
215
216 ```
217 # compute r3 = ternlog(r4, r5, r6, table=r7)
218 # compute the values for when r6[i] = 0:
219 binlog r3, r4, r5, r7, 0 # takes look-up-table from LSB 4 bits
220 # compute the values for when r6[i] = 1:
221 binlog r4, r4, r5, r7, 1 # takes look-up-table from second-to-LSB 4 bits
222 # mux the two results together: r3 = (r3 & ~r6) | (r4 & r6)
223 ternlogi r3, r4, r6, 0b11011000
224 ```
225
226 ----------
227
228 \newpage{}
229
230 ## Condition Register Field Dynamic Binary Logic
231
232 Add this section to Book I 2.5.1
233
234 CRB-form
235
236 | 0.5|6.8 |9.10|11.13|14.15|16.18|19.25|26.30| 31| Form |
237 |----|----|----|-----|-----|-----|-----|-----|---|----------|
238 | PO | BF | msk|BFA | msk | BFB | // | XO |// | CRB-Form |
239
240 * `crfbinlog BF, BFA, BFB, msk`
241
242 Pseudocode:
243
244 ```
245 a <- CR[4*BF+32:4*BFA+35]
246 b <- CR[4*BFA+32:4*BFA+35]
247 lut <- CR[4*BFB+32:4*BFB+35]
248 binary <- (~a & ~b & lut[0]*4) |
249 (~a & b & lut[1]*4) |
250 ( a & ~b & lut[2]*4) |
251 ( a & b & lut[3]*4))
252 do i = 0 to 3
253 if msk[i] = 1 then
254 CR[4*BF+32+i] <- binary[i]
255 ```
256
257 For each integer value i, 0 to 3, do the following.
258
259 ```
260 Let j be the value of the concatenation of the
261 contents of bit i of CR Field BF with bit i of CR Field BFA.
262
263 If bit i of msk is set to 1 then the value of bit j of
264 CR Field BFB is placed into bit i of CR Field BF.
265
266 Otherwise, if bit i of msk is a zero then bit i of
267 CR Field BF is unchanged.
268 ```
269
270 If `msk` is zero an Illegal Instruction trap is raised.
271
272 Special registers altered:
273
274 ```
275 CR field BF
276 ```
277
278 *Programmer's Note: just as with binlut and ternlogi, a pair
279 of crbinlog instructions followed by a merging crternlogi may
280 be deployed to synthesise dynamic ternary (LUT3) CR Field
281 manipulation*
282
283 *Programmer's Note: this instruction is a "masked" overwrite on CR
284 Field BF. For each bit set in `msk` a Write is performed
285 but for each bit clear in `msk` the corresponding bit of BF is
286 preserved. Overall this makes `crbinlog` a conditionally
287 Read-Modify-Write instruction on CR Field BF.
288 A simple copy instruction may be used to achieve the effect of
289 3-in 1-out. The copy instruction should come immediately before
290 `crternlogi` so that hardware may optionally Macro-Op Fuse them*
291
292 ## Condition Register Dynamic Binary Logic
293
294 Add this section to Book I 2.5.1
295
296 X-form
297
298 | 0.5|6.10|11.15|16.20|21.30| 31| Form |
299 |----|----|-----|-----|-----|---|----------|
300 | PO | BT | BA | BB | XO | / | CRB-Form |
301
302 * `crbinlog BF, BFA, BFB, msk`
303
304 Pseudocode:
305
306 ```
307 lut <- CR[4*BFB+32:4*BFB+35]
308 idx <- CR[BT+32] || CR[BA+32]
309 CR[BT+32] <- lut[3-idx]
310 ```
311
312 Special registers altered:
313
314 ```
315 CR[BT+32]
316 ```
317
318 *Programmer's Note: just as with binlut and ternlogi, a pair
319 of crbinlog instructions followed by a merging crternlogi may
320 be deployed to synthesise dynamic ternary (LUT3) CR Field
321 manipulation*
322
323 [[!tag standards]]
324
325 ----------
326
327 \newpage{}
328