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[libreriscv.git] / shakti / m_class / HyperRAM.mdwn
1 # HyperRAM (Octal SPI)
2
3 * <https://github.com/blackmesalabs/hyperram>
4 * Symbiotic EDA have a DDR variant that they can make libre for the
5 right $
6 * Litex Hub <https://github.com/litex-hub/litehyperbus>
7 * <https://github.com/zeldin/litehyperram>
8 * VHDL hyperram <https://github.com/MJoergen/HyperRAM>
9 * [[HDL_workflow/HyperRAM]]
10 * <https://www.infineon.com/dgdl/Infineon-AN226576_Getting_Started_with_HyperRAM-ApplicationNotes-v02_00-EN.pdf>