shakti/m_class/libre_3d_gpu.mdwn

   1 # Libre 3D GPU Requirements
   2
   3 ## GPU capabilities
   4
   5 Based on GC800 the following would be acceptable performance (as would Mali-400):
   6
   7 * 35 million triangles/sec
   8 * 325 milllion pixels/sec
   9 * 6 GFLOPS
  10
  11 ## GPU size and power
  12
  13 * Basically the power requirement should be at or below around 1 watt in 40nm. Beyond 1 watt it becomes... difficult.
  14 * Size is not particularly critical as such but should not be insane.
  15
  16 Based on GC800 the following would be acceptable area in 40nm:
  17
  18 * 1.9mm^2 synthesis area
  19 * 2.5mm^2 silicon area.
  20
  21 So here's a table showing embedded cores:
  22
  23 <https://www.cnx-software.com/2013/01/19/gpus-comparison-arm-mali-vs-vivante-gcxxx-vs-powervr-sgx-vs-nvidia-geforce-ulp/>
  24
  25 Silicon area corresponds *ROUGHLY* with power usage, but PLEASE do
  26 not take that as absolute, because if you read Jeff's Nyuzi 2016 paper
  27 you'll see that getting data through the L1/L2 cache barrier is by far
  28 and above the biggest eater of power.
  29
  30 Note lower down that the numbers for Mali-400 are for the *4* core
  31 version - Mali-400 (MP4) - where Jeff and I compared Mali-400 SINGLE CORE
  32 and discovered that Nyuzi, if 4 parallel Nyuzi cores were put
  33 together, would reach only 25% of Mali-400's performance (in about the
  34 same silicon area).
  35
  36 ## Other
  37
  38 * The deadline is about 12-18 months.
  39 * It is highly recommended to use Gallium3D for the software stack.
  40 * Software must be licensed under LGPLv2+ or BSD/MIT.
  41 * Hardware (RTL) must be licensed under BSD or MIT with no
  42   "NON-COMMERCIAL" CLAUSES.
  43 * Any proposals will be competing against Vivante GC800 (using Etnaviv driver).
  44 * The GPU is integrated (like Mali-400). So all that the GPU needs to do is write to an area of memory (framebuffer or area of the framebuffer). The SoC - which in this case has a RISC-V core and has peripherals such as the LCD controller - will take care of the rest.
  45 * In this arcitecture, the GPU, the CPU and the peripherals are all on the same AXI4 shared memory bus. They all have access to the same shared DDR3/DDR4 RAM. So as a result the GPU will use AXI4 to write directly to the framebuffer and the rest will be handle by SoC.
  46 * The job must be done by a team that shows sufficient expertise to reduce the risk.
  47
  48 ## Notes
  49
  50 * The deadline is really tight. If an FPGA (or simulation) plus the basics of the software driver are at least prototyped by then it *might* be ok.
  51 * If using Nyuzi as the basis it *might* be possible to begin the software port in parallel because Jeff went to the trouble of writing a cycle-accurate simulation.
  52 * I *suspect* it will result in less work to use Gallium3D than, for example, writing an entire OpenGL stack from scratch.
  53 * A *demo* should run on an FPGA as an initial. The FPGA is not a priority for assessment, but it would be *nice* if
  54 it could fit into a ZC706.
  55 * Also if there is parallel hardware obviously it would be nice to be able to demonstrate parallelism to the maximum extend possible. But again, being reasonable, if the GPU is so big that only a single core can fit into even a large FPGA then for an initial demo that would be fine.
  56 * Note that no other licenses are acceptable. GPLv2+ is out.
  57
  58 ## Design decisions and considerations
  59
  60 Whilst Nyuzi has a big advantage in that it has simuations and also a
  61 llvm port and so on, if utilised for this particular RISC-V chip it would
  62 mean needing to write a "memory shim" between the general-purpose Nyuzi
  63 core and the main processor, i.e. all the shader info, state etc. needs
  64 synchronisation hardware (and software).
  65
  66 That could significantly complicate design, especially of software.
  67
  68 Whilst i *recommended* Gallium3D there is actually another possible
  69 approach: a RISC-V multi-core design which accelerates *software*
  70 rendering... including potentially utilising the fact that Gallium3D
  71 has a *software* (LLVM) renderer:
  72
  73 <https://mesa3d.org/llvmpipe.html>
  74
  75 The general aim of this approach is *not* to have the complexity of
  76 transferring significant amounts of data structures to and from disparate
  77 cores (one Nyuzi, one RISC-V) but to STAY WITHIN THE RISC-V ARCHITECTURE
  78 and simply compile Mesa3D (for RISC-V), gallium3d-llvm (for RISC-V),
  79 modifying llvm for RISC-V to do the heavy-lifting instead.
  80
  81 Then it just becomes a matter of adding vector / SIMD / parallelisation
  82 extensions to RISC-V, and adding support in LLVM for the same:
  83
  84 <https://lists.llvm.org/pipermail/llvm-dev/2018-April/122517.html>
  85
  86 So if considering to base the design on RISC-V, that means turning RISC-V
  87 into a vector processor. Now, whilst Hwacha has been located (finally),
  88 it's a design that is specifically targetted at supercomputers. I have
  89 been taking an alternative approach to vectorisation which is more about
  90 *parallelisation* than it is about *vectorisation*.
  91
  92 It would be great for Simple-V to be given consideration for
  93 implementation as the abstraction "API" of Simple-V would greatly simplify
  94 the addition process of Custom features such as fixed-function pixel
  95 conversion and rasterisation instructions (if those are chosen to be
  96 added) and so on. Bear in mind that a high-speed clock rate is NOT a
  97 good idea for GPUs (power being a square law), multi-core parallelism
  98 and longer SIMD/vectors are much better to consider, instead.
  99
 100 the PDF/slides on Simple-V is here:
 101
 102 <http://hands.com/~lkcl/simple_v_chennai_2018.pdf>
 103
 104 and the assessment, design and implementation is being done here:
 105
 106 <http://libre-riscv.org/simple_v_extension/>
 107
 108 ## Q & A
 109
 110 > Q:
 111 >
 112 > Do you need a team with good CVs? What about if the
 113 > team shows you an acceptable FPGA prototype? I’m talking about a team
 114 > of students which do not have big industrial CVs but they know how to
 115 > handle this job (just like RocketChip or MIAOW or etc…).
 116
 117 A:
 118
 119 That would be fantastic as it would demonstrate not only competence
 120 but also commitment. And will have taken out the "risk" of being
 121 "unknown", entirely. So that works perfectly for me :) .