simple_v_extension/bigint_example.mdwn

   1     li t1, -1 # 0xfffffff...fff
   2     VBLK.pred.t3 = {inv, t0}
   3     VBLK.pred.t4 = {t0 }
   4     VBLK.reg.a0 = {vec}
   5     VBLK.reg.a1 = {vec}
   6     VBLK.reg.t4 = {vec}
   7     VBLK.VL = 8
   8     {
   9      add t4, a0, a1 # vector add of int64
  10      sub t3, x0, a1 # invert a1
  11      BLT a0, t3, cont # stores tests in t0
  12      c.ret
  13     }
  14     VBLK.pred.t1 = {inv, t0}
  15     VBLK.pred.t4 = {t0}
  16     VBLK.reg.t4 = {vec}
  17     VBLK.VL = 8
  18     {
  19      cont:
  20      c.slli t0, 1 # shifts up carry by 1
  21      c.addi t4, 1 # predicated on t0
  22      BLT t4, t1, cont2 # tests into t0
  23      c.ret
  24      cont2:
  25      c.j cont
  26     }
  27