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diff --git a/3d_gpu.mdwn b/3d_gpu.mdwn
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--- a/3d_gpu.mdwn
+++ b/3d_gpu.mdwn
@@ -27,7 +27,7 @@ the cost of product development when it comes to PCB design and layout:
 We can look at larger higher-power ASICs either later or, if funding
 is made available, immediately.
 
-Recent applications (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz.  This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
+Recent applications to NLNet (Oct 2019) are for a test chip in 180nm, 64 bit, single core dual issue, around 300 to 350mhz.  This will provide the confidence to go to higher geometries, as well as be a commercially viable embedded product in its own right.
 
 See: