(no commit message)
authorlkcl <lkcl@web>
Sat, 29 Jan 2022 23:31:33 +0000 (23:31 +0000)
committerIkiWiki <ikiwiki.info>
Sat, 29 Jan 2022 23:31:33 +0000 (23:31 +0000)
shakti/m_class/sdram.mdwn

index 54cb59c69875ad283f847c858bb02e5246c889d5..0f4820ee27ec0115f5ba683bdd26b5eacccf01f9 100644 (file)
@@ -4,4 +4,7 @@
 * <https://opencores.org/projects/sdr_ctrl>
 * WIP <https://gitlab.com/jock_tanner/asceticore/-/blob/master/control.py#L24-31>
 * simulation verilator https://github.com/ZipCPU/xulalx25soc/blob/master/bench/cpp/sdramsim.cpp
-* breakout board for FPGA <https://rlx.sk/en/breakout-boards-shields/5155-sdram-board-b-waveshare-8mx16bit-sdram-h57v1262gtr.html>
+* breakout board for FPGA
+  - <https://rlx.sk/en/breakout-boards-shields/5155-sdram-board-b-waveshare-8mx16bit-sdram-h57v1262gtr.html>
+  - <https://rarecomponents.com/store/sdram-board-b>
+  - <https://hackaday.io/project/20053-anacon-xc/log/54443-sdram-breakout-board-designed>