src/bsv/pinmux_generator.py

   1 # ================================== Steps to add peripherals ============
   2 # Step-1:   create interface declaration for the peripheral to be added.
   3 #           Remember these are interfaces defined for the pinmux and hence
   4 #           will be opposite to those defined at the peripheral.
   5 #           For eg. the output TX from the UART will be input (method Action)
   6 #           for the pinmux.
   7 #           These changes will have to be done in interface_decl.py
   8 # Step-2    define the wires that will be required to transfer data from the
   9 #           peripheral interface to the IO cell and vice-versa. Create a
  10 #           mkDWire for each input/output between the peripheral and the
  11 #           pinmux. Also create an implicit wire of GenericIOType for each cell
  12 #           that can be connected to a each bit from the peripheral.
  13 #           These changes will have to be done in wire_def.py
  14 # Step-3:   create the definitions for each of the methods defined above.
  15 #           These changes will have to be done in interface_decl.py
  16 # ========================================================================
  17
  18 # default module imports
  19 import shutil
  20 import os
  21 import os.path
  22 import time
  23
  24 # project module imports
  25 from bsv.interface_decl import Interfaces, mux_interface, io_interface
  26 from parse import Parse
  27 from bsv.actual_pinmux import init
  28 from bsv.bus_transactors import axi4_lite
  29
  30 copyright = '''
  31 /*
  32    This BSV file has been generated by the PinMux tool available at:
  33    https://bitbucket.org/casl/pinmux.
  34
  35    Authors: Neel Gala, Luke
  36    Date of generation: ''' + time.strftime("%c") + '''
  37 */
  38 '''
  39 header = copyright + '''
  40 package pinmux;
  41
  42 '''
  43 footer = '''
  44    endmodule
  45 endpackage
  46 '''
  47
  48
  49 def pinmuxgen(pth=None, verify=True):
  50     """ populating the file with the code
  51     """
  52
  53     p = Parse(pth, verify)
  54     iocells = Interfaces()
  55     iocells.ifaceadd('io', p.N_IO, io_interface, 0)
  56     ifaces = Interfaces(pth)
  57     #ifaces.ifaceadd('io', p.N_IO, io_interface, 0)
  58     init(p, ifaces)
  59
  60     bp = 'bsv_src'
  61     if pth:
  62         bp = os.path.join(pth, bp)
  63     if not os.path.exists(bp):
  64         os.makedirs(bp)
  65     bl = os.path.join(bp, 'bsv_lib')
  66     if not os.path.exists(bl):
  67         os.makedirs(bl)
  68
  69     cwd = os.path.split(__file__)[0]
  70
  71     # copy over template and library files
  72     shutil.copyfile(os.path.join(cwd, 'Makefile.template'),
  73                     os.path.join(bp, 'Makefile'))
  74     cwd = os.path.join(cwd, 'bsv_lib')
  75     for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv']:
  76         shutil.copyfile(os.path.join(cwd, fname),
  77                         os.path.join(bl, fname))
  78
  79     bus = os.path.join(bp, 'busenable.bsv')
  80     pmp = os.path.join(bp, 'pinmux.bsv')
  81     ptp = os.path.join(bp, 'PinTop.bsv')
  82     bvp = os.path.join(bp, 'bus.bsv')
  83
  84     write_pmp(pmp, p, ifaces, iocells)
  85     write_ptp(ptp, p, ifaces)
  86     write_bvp(bvp, p, ifaces)
  87     write_bus(bus, p, ifaces)
  88
  89
  90 def write_bus(bus, p, ifaces):
  91     # package and interface declaration followed by
  92     # the generic io_cell definition
  93     with open(bus, "w") as bsv_file:
  94         ifaces.busfmt(bsv_file)
  95
  96
  97 def write_pmp(pmp, p, ifaces, iocells):
  98     # package and interface declaration followed by
  99     # the generic io_cell definition
 100     with open(pmp, "w") as bsv_file:
 101         bsv_file.write(header)
 102
 103         cell_bit_width = 'Bit#(%d)' % p.cell_bitwidth
 104         bsv_file.write('''\
 105    interface MuxSelectionLines;
 106
 107       // declare the method which will capture the user pin-mux
 108       // selection values.The width of the input is dependent on the number
 109       // of muxes happening per IO. For now we have a generalized width
 110       // where each IO will have the same number of muxes.''')
 111
 112         for cell in p.muxed_cells:
 113             bsv_file.write(mux_interface.ifacefmt(cell[0], cell_bit_width))
 114
 115         bsv_file.write("\n      endinterface\n")
 116
 117         bsv_file.write('''
 118
 119       interface PeripheralSide;
 120       // declare the interface to the peripherals
 121       // Each IO cell will have 3 input field (output from pin mux
 122       // and on output field (input to pinmux)''')
 123         # ==============================================================
 124
 125         # == create method definitions for all peripheral interfaces ==#
 126         iocells.ifacefmt(bsv_file)
 127
 128         # ===== finish interface definition and start module definition=======
 129         bsv_file.write("\n      endinterface\n")
 130
 131         # ===== io cell definition =======
 132         bsv_file.write('''
 133
 134       interface IOCellSide;
 135       // declare the interface to the IO cells.
 136       // Each IO cell will have 3 input field (output from pin mux
 137       // and on output field (input to pinmux)''')
 138
 139         # == create method definitions for all iocell interfaces ==#
 140         ifaces.ifacefmt(bsv_file)
 141         bsv_file.write("\n      endinterface\n")
 142
 143         # ===== finish interface definition and start module definition=======
 144         bsv_file.write('''
 145
 146    interface Ifc_pinmux;
 147       interface MuxSelectionLines mux_lines;
 148       interface PeripheralSide peripheral_side;
 149       interface IOCellSide iocell_side;
 150    endinterface
 151    (*synthesize*)
 152    module mkpinmux(Ifc_pinmux);
 153 ''')
 154         # ====================================================================
 155
 156         # ======================= create wire and registers =================#
 157         bsv_file.write('''
 158       // the followins wires capture the pin-mux selection
 159       // values for each mux assigned to a CELL
 160 ''')
 161         for cell in p.muxed_cells:
 162             bsv_file.write(mux_interface.wirefmt(
 163                 cell[0], cell_bit_width))
 164
 165         iocells.wirefmt(bsv_file)
 166         ifaces.wirefmt(bsv_file)
 167
 168         bsv_file.write("\n")
 169         # ====================================================================
 170         # ========================= Actual pinmuxing ========================#
 171         bsv_file.write('''
 172       /*====== This where the muxing starts for each io-cell======*/
 173 ''')
 174         bsv_file.write(p.pinmux)
 175         bsv_file.write('''
 176       /*============================================================*/
 177 ''')
 178         # ====================================================================
 179         # ================= interface definitions for each method =============#
 180         bsv_file.write('''
 181     interface mux_lines = interface MuxSelectionLines
 182 ''')
 183         for cell in p.muxed_cells:
 184             bsv_file.write(
 185                 mux_interface.ifacedef(
 186                     cell[0], cell_bit_width))
 187         bsv_file.write("\n    endinterface;")
 188
 189         bsv_file.write('''
 190     interface iocell_side = interface IOCellSide
 191 ''')
 192         iocells.ifacedef(bsv_file)
 193         bsv_file.write("\n     endinterface;")
 194
 195         bsv_file.write('''
 196     interface peripheral_side = interface PeripheralSide
 197 ''')
 198         ifaces.ifacedef(bsv_file)
 199         bsv_file.write("\n     endinterface;")
 200
 201
 202         bsv_file.write(footer)
 203         print("BSV file successfully generated: bsv_src/pinmux.bsv")
 204         # ======================================================================
 205
 206
 207 def write_ptp(ptp, p, ifaces):
 208     with open(ptp, 'w') as bsv_file:
 209         bsv_file.write(copyright + '''
 210 package PinTop;
 211     import pinmux::*;
 212     interface Ifc_PintTop;
 213         method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
 214         method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
 215         interface PeripheralSide peripheral_side;
 216     endinterface
 217
 218     module mkPinTop(Ifc_PintTop);
 219         // instantiate the pin-mux module here
 220         Ifc_pinmux pinmux <-mkpinmux;
 221
 222         // declare the registers which will be used to mux the IOs
 223 '''.format(p.ADDR_WIDTH, p.DATA_WIDTH))
 224
 225         cell_bit_width = str(p.cell_bitwidth)
 226         for cell in p.muxed_cells:
 227             bsv_file.write('''
 228                 Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
 229                 cell_bit_width, cell[0]))
 230
 231         bsv_file.write('''
 232         // rule to connect the registers to the selection lines of the
 233         // pin-mux module
 234         rule connect_selection_registers;''')
 235
 236         for cell in p.muxed_cells:
 237             bsv_file.write('''
 238           pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell[0]))
 239
 240         bsv_file.write('''
 241         endrule
 242         // method definitions for the write user interface
 243         method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
 244           Bool err=False;
 245           case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
 246                                          p.ADDR_WIDTH, p.DATA_WIDTH))
 247         index = 0
 248         for cell in p.muxed_cells:
 249             bsv_file.write('''
 250             {0}: rg_muxio_{1}<=truncate(data);'''.format(index, cell[0]))
 251             index = index + 1
 252
 253         bsv_file.write('''
 254             default: err=True;
 255           endcase
 256           return err;
 257         endmethod''')
 258
 259         bsv_file.write('''
 260         // method definitions for the read user interface
 261         method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
 262           Bool err=False;
 263           Bit#(32) data=0;
 264           case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
 265                                          p.ADDR_WIDTH, p.DATA_WIDTH))
 266         index = 0
 267         for cell in p.muxed_cells:
 268             bsv_file.write('''
 269                 {0}: data=zeroExtend(rg_muxio_{1});'''.format(index, cell[0]))
 270             index = index + 1
 271
 272         bsv_file.write('''
 273             default:err=True;
 274           endcase
 275           return tuple2(err,data);
 276         endmethod
 277         interface peripheral_side=pinmux.peripheral_side;
 278     endmodule
 279 endpackage
 280 ''')
 281
 282
 283 def write_bvp(bvp, p, ifaces):
 284     # ######## Generate bus transactors ################
 285     with open(bvp, 'w') as bsv_file:
 286         bsv_file.write(axi4_lite.format(p.ADDR_WIDTH, p.DATA_WIDTH))
 287     # ##################################################