autopep8 whitespace cleanup
[pinmux.git] / src / spec / pinfunctions.py
1 #!/usr/bin/env python
2
3 """ define functions here, with their pin names and the pin type.
4
5 each function returns a list (or an object with a __getitem__ function)
6 containing pin name plus type specifications.
7
8 the type is:
9
10 * "-" for an input pin,
11 * "+" for an output pin,
12 * "*" for an in/out pin
13
14 each function is then added to the pinspec tuple, below, as a ("NAME",
15 function) entry.
16
17 different functions may be added multiple times under the same NAME,
18 so that complex (or large) functions can be split into one or more
19 groups (and placed on different pinbanks).
20
21 eint, pwm and gpio are slightly odd in that instead of a fixed list
22 an object is returned with a __getitem__ function that accepts a
23 slice object. in this way the actual generation of the pin name
24 is delayed until it is known precisely how many pins are to be
25 generated, and that's not known immediately (or it would be if
26 every single one of the functions below had a start and end parameter
27 added). see spec.interfaces.PinGen class slice on pingroup
28 """
29
30
31 def i2s(suffix, bank):
32 return ['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+']
33
34
35 def emmc(suffix, bank):
36 emmcpins = ['CMD+', 'CLK+']
37 for i in range(8):
38 emmcpins.append("D%d*" % i)
39 return emmcpins
40
41
42 def sdmmc(suffix, bank):
43 sdmmcpins = ['CMD+', 'CLK+']
44 for i in range(4):
45 sdmmcpins.append("D%d*" % i)
46 return sdmmcpins
47
48
49 def spi(suffix, bank):
50 return ['CLK*', 'NSS*', 'MOSI*', 'MISO*']
51
52
53 def quadspi(suffix, bank):
54 return ['CK*', 'NSS*', 'IO0*', 'IO1*', 'IO2*', 'IO3*']
55
56
57 def i2c(suffix, bank):
58 return ['SDA*', 'SCL*']
59
60
61 def jtag(suffix, bank):
62 return ['MS+', 'DI-', 'DO+', 'CK+']
63
64
65 def uart(suffix, bank):
66 return ['TX+', 'RX-']
67
68
69 def ulpi(suffix, bank):
70 ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
71 for i in range(8):
72 ulpipins.append('D%d*' % i)
73 return ulpipins
74
75
76 def uartfull(suffix, bank):
77 return ['TX+', 'RX-', 'CTS-', 'RTS+']
78
79
80 def rgbttl(suffix, bank):
81 ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
82 for i in range(24):
83 ttlpins.append("D%d+" % i)
84 return ttlpins
85
86
87 def rgmii(suffix, bank):
88 buspins = []
89 for i in range(4):
90 buspins.append("ERXD%d-" % i)
91 for i in range(4):
92 buspins.append("ETXD%d+" % i)
93 buspins += ['ERXCK-', 'ERXERR-', 'ERXDV-',
94 'EMDC+', 'EMDIO*',
95 'ETXEN+', 'ETXCK+', 'ECRS-',
96 'ECOL+', 'ETXERR+']
97 return buspins
98
99
100 def flexbus1(suffix, bank):
101 buspins = []
102 for i in range(8):
103 buspins.append("AD%d*" % i)
104 for i in range(2):
105 buspins.append("CS%d+" % i)
106 buspins += ['ALE', 'OE', 'RW', 'TA', 'CLK+',
107 'A0', 'A1', 'TS', 'TBST',
108 'TSIZ0', 'TSIZ1']
109 for i in range(4):
110 buspins.append("BWE%d" % i)
111 for i in range(2, 6):
112 buspins.append("CS%d+" % i)
113 return buspins
114
115
116 def flexbus2(suffix, bank):
117 buspins = []
118 for i in range(8, 32):
119 buspins.append("AD%d*" % i)
120 return buspins
121
122
123 def sdram1(suffix, bank):
124 buspins = []
125 for i in range(16):
126 buspins.append("SDRDQM%d*" % i)
127 for i in range(12):
128 buspins.append("SDRAD%d+" % i)
129 for i in range(8):
130 buspins.append("SDRDQ%d+" % i)
131 for i in range(3):
132 buspins.append("SDRCS%d#+" % i)
133 for i in range(2):
134 buspins.append("SDRDQ%d+" % i)
135 for i in range(2):
136 buspins.append("SDRBA%d+" % i)
137 buspins += ['SDRCKE+', 'SDRRAS#+', 'SDRCAS#+', 'SDRWE#+',
138 'SDRRST+']
139 return buspins
140
141
142 def sdram2(suffix, bank):
143 buspins = []
144 for i in range(3, 6):
145 buspins.append("SDRCS%d#+" % i)
146 for i in range(8, 32):
147 buspins.append("SDRDQ%d*" % i)
148 return buspins
149
150
151 def mcu8080(suffix, bank):
152 buspins = []
153 for i in range(8):
154 buspins.append("MCUD%d*" % i)
155 for i in range(8):
156 buspins.append("MCUAD%d+" % (i + 8))
157 for i in range(6):
158 buspins.append("MCUCS%d+" % i)
159 for i in range(2):
160 buspins.append("MCUNRB%d+" % i)
161 buspins += ['MCUCD+', 'MCURD+', 'MCUWR+', 'MCUCLE+', 'MCUALE+',
162 'MCURST+']
163 return buspins
164
165
166 class RangePin(object):
167 def __init__(self, suffix, prefix=None):
168 self.suffix = suffix
169 self.prefix = prefix or ''
170
171 def __getitem__(self, s):
172 res = []
173 for idx in range(s.start or 0, s.stop or -1, s.step or 1):
174 res.append("%s%d%s" % (self.prefix, idx, self.suffix))
175 return res
176
177
178 def eint(suffix, bank):
179 return RangePin("*")
180
181
182 def pwm(suffix, bank):
183 return RangePin("+")
184
185
186 def gpio(suffix, bank):
187 return ("GPIO%s" % bank, RangePin(prefix=bank, suffix="*"))
188
189
190 # list functions by name here
191
192 pinspec = (('IIS', i2s),
193 ('MMC', emmc),
194 ('SD', sdmmc),
195 ('SPI', spi),
196 ('QSPI', quadspi),
197 ('TWI', i2c),
198 ('JTAG', jtag),
199 ('UART', uart),
200 ('UARTQ', uartfull),
201 ('LCD', rgbttl),
202 ('ULPI', ulpi),
203 ('RG', rgmii),
204 ('FB', flexbus1),
205 ('FB', flexbus2),
206 ('SDR', sdram1),
207 ('SDR', sdram2),
208 ('EINT', eint),
209 ('PWM', pwm),
210 ('GPIO', gpio),
211 )