remove write_ptp, add bitwidths.txt file

diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py
index b348cf47465aa49c8574fe2745d2d8f9941f0ce5..bcc1b254cb9b0a5a5d5582fb3eb8d3bcd3057eea 100644 (file)
--- a/src/bsv/pinmux_generator.py
+++ b/src/bsv/pinmux_generator.py
@@ -81,7 +81,6 @@ def pinmuxgen(pth=None, verify=True):
 
     bus = os.path.join(bp, 'busenable.bsv')
     pmp = os.path.join(bp, 'pinmux.bsv')
-    ptp = os.path.join(bp, 'PinTop.bsv')
     bvp = os.path.join(bp, 'bus.bsv')
     idef = os.path.join(bp, 'instance_defines.bsv')
     slow = os.path.join(bp, 'slow_peripherals.bsv')
@@ -94,7 +93,6 @@ def pinmuxgen(pth=None, verify=True):
     soct = os.path.join(cwd, 'soc_template.bsv')
 
     write_pmp(pmp, p, ifaces, iocells)
-    write_ptp(ptp, p, ifaces)
     write_bvp(bvp, p, ifaces)
     write_bus(bus, p, ifaces)
     write_instances(idef, p, ifaces)
@@ -322,82 +320,6 @@ def write_pmp(pmp, p, ifaces, iocells):
         # ======================================================================
 
 
-def write_ptp(ptp, p, ifaces):
-    with open(ptp, 'w') as bsv_file:
-        bsv_file.write(copyright + '''
-package PinTop;
-    import pinmux::*;
-    interface Ifc_PintTop;
-        method ActionValue#(Bool) write(Bit#({0}) addr, Bit#({1}) data);
-        method Tuple2#(Bool,Bit#({1})) read(Bit#({0}) addr);
-        interface PeripheralSide peripheral_side;
-    endinterface
-
-    module mkPinTop(Ifc_PintTop);
-        // instantiate the pin-mux module here
-        Ifc_pinmux pinmux <-mkpinmux;
-
-        // declare the registers which will be used to mux the IOs
-'''.format(p.ADDR_WIDTH, p.DATA_WIDTH))
-
-        cell_bit_width = str(p.cell_bitwidth)
-        for cell in p.muxed_cells:
-            bsv_file.write('''
-                Reg#(Bit#({0})) rg_muxio_{1} <-mkReg(0);'''.format(
-                cell_bit_width, cell[0]))
-
-        bsv_file.write('''
-        // rule to connect the registers to the selection lines of the
-        // pin-mux module
-        rule connect_selection_registers;''')
-
-        for cell in p.muxed_cells:
-            bsv_file.write('''
-          pinmux.mux_lines.cell{0}_mux(rg_muxio_{0});'''.format(cell[0]))
-
-        bsv_file.write('''
-        endrule
-        // method definitions for the write user interface
-        method ActionValue#(Bool) write(Bit#({2}) addr, Bit#({3}) data);
-          Bool err=False;
-          case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
-                                         p.ADDR_WIDTH, p.DATA_WIDTH))
-        index = 0
-        for cell in p.muxed_cells:
-            bsv_file.write('''
-            {0}: rg_muxio_{1}<=truncate(data);'''.format(index, cell[0]))
-            index = index + 1
-
-        bsv_file.write('''
-            default: err=True;
-          endcase
-          return err;
-        endmethod''')
-
-        bsv_file.write('''
-        // method definitions for the read user interface
-        method Tuple2#(Bool,Bit#({3})) read(Bit#({2}) addr);
-          Bool err=False;
-          Bit#(32) data=0;
-          case (addr[{0}:{1}])'''.format(p.upper_offset, p.lower_offset,
-                                         p.ADDR_WIDTH, p.DATA_WIDTH))
-        index = 0
-        for cell in p.muxed_cells:
-            bsv_file.write('''
-                {0}: data=zeroExtend(rg_muxio_{1});'''.format(index, cell[0]))
-            index = index + 1
-
-        bsv_file.write('''
-            default:err=True;
-          endcase
-          return tuple2(err,data);
-        endmethod
-        interface peripheral_side=pinmux.peripheral_side;
-    endmodule
-endpackage
-''')
-
-
 def write_bvp(bvp, p, ifaces):
     # ######## Generate bus transactors ################
     gpiocfg = '\t\tinterface GPIO_config#({4}) bank{3}_config;\n' \

diff --git a/src/parse.py b/src/parse.py
index 16927efa841235a3d27c110def4e7868b9fea02c..6ab3dd094230c4a3ce66f34f8f0f8228da78342c 100644 (file)
--- a/src/parse.py
+++ b/src/parse.py
@@ -13,33 +13,27 @@ class Parse(object):
     N_MUX = 1          # number of selection lines for the mux per io
     N_IO = 0
     N_MUX_IO = 0
-    Addressing = 'WORD'
     ADDR_WIDTH = 64  # TODO parameterise
     PADDR_WIDTH = 32  # TODO parameterise
     DATA_WIDTH = 64  # TODO parameterise
     # ================ #
 
-    # Generating the number of bits for memory map #
-    lower_offset = 0
-    if Addressing == 'BYTE':
-        lower_offset = 0
-    elif Addressing == 'HWORD':
-        lower_offset = 1
-    elif Addressing == 'WORD':
-        lower_offset = 2
-    elif Addressing == 'DWORD':
-        lower_offset = 3
-    else:
-        print('ERROR: Addressing should be one of: BYTE, HWORD, WORD, DWORD')
-        exit(1)
-
     def __init__(self, pth=None, verify=True):
 
         max_io = 0
         self.muxed_cells = []
         self.dedicated_cells = []
         self.pinnumbers = []
+        self.bankwidths = {} 
 
+        fname = 'bankwidths.txt'
+        if pth:
+            fname = os.path.join(pth, fname)
+        with open(fname) as bankwidths:
+            for lineno, line in enumerate(bankwidths):
+                line1 = line[:-1].split('\t')
+                self.bankwidths[line1[0]] = int(line1[1])
+            
         # == capture the number of IO cells required == #
         fname = 'pinmap.txt'
         if pth:
@@ -47,7 +41,7 @@ class Parse(object):
         with open(fname) as pinmapfile:
             for lineno, line in enumerate(pinmapfile):
                 line1 = line[:-1].split('\t')
-                if len(line1) <= 1:
+                if len(line1) <= 2:
                     continue
                 self.pinnumbers.append(int(line1[0]))
                 # XXX TODO: dedicated pins in separate file
@@ -61,20 +55,19 @@ class Parse(object):
                 self.muxed_cells.append(line1)
 
         self.pinnumbers = sorted(self.pinnumbers)
-        self.upper_offset = self.lower_offset + \
-            int(math.log(len(self.muxed_cells), 2))
 
         if verify:
             self.do_checks()
 
-        self.cell_bitwidth = self.get_cell_bit_width()
+        #self.cell_bitwidth = self.get_cell_bit_widths()
 
         # == user info after parsing ================= #
         self.N_IO = len(self.dedicated_cells) + len(self.muxed_cells)
         print("Max number of IO: " + str(self.N_IO))
-        print("Muxer bit width: " + str(self.cell_bitwidth))
+        #print("Muxer bit width: " + str(self.cell_bitwidth))
         print("Muxed IOs: " + str(len(self.muxed_cells)))
         print("Dedicated IOs: " + str(len(self.dedicated_cells)))
+        #sys.exit(0)
 
     def do_checks(self):
         """ Multiple checks to see if the user has not screwed up
@@ -109,9 +102,10 @@ class Parse(object):
 
         # TODO
 
-    def get_cell_bit_width(self):
+    def get_cell_bit_widths(self, banks):
         max_num_cells = 0
         for cell in self.muxed_cells:
+            print cell
             max_num_cells = max(len(cell) - 1, max_num_cells)
         return int(math.log(max_num_cells + 1, 2))
 

diff --git a/src/spec/gen.py b/src/spec/gen.py
index 1ce10e3cdc473f0f7255aeec86fe40b461dc8d54..8a54e9353505b5473ceb76fd9d2d316bba7f9087 100644 (file)
--- a/src/spec/gen.py
+++ b/src/spec/gen.py
@@ -28,6 +28,9 @@ def specgen(of, pth, pinouts, bankspec, pinbanks, fixedpins, fastbus):
     #print pinouts.ganged.items()
     if not os.path.exists(pth):
         os.makedirs(pth)
+    with open(os.path.join(pth, 'bankwidths.txt'), 'w') as f:
+        for k, v in pinouts.muxwidths.items():
+            f.write("%s\t%d\n" % (k, v))
     with open(os.path.join(pth, 'interfaces.txt'), 'w') as f:
         for k in pinouts.fnspec.keys():
             s = pinouts.fnspec[k]