2 #include "hwacha_xcpt.h"
7 REGISTER_EXTENSION(hwacha
, []() { return new hwacha_t
; })
9 void ct_state_t::reset()
21 void ut_state_t::reset()
23 memset(this, 0, sizeof(*this));
26 void hwacha_t::reset()
29 for (int i
=0; i
<max_uts
; i
++)
33 static reg_t
custom(processor_t
* p
, insn_t insn
, reg_t pc
)
36 hwacha_t
* h
= static_cast<hwacha_t
*>(p
->get_extension());
42 #define DECLARE_INSN(name, match, mask) \
43 extern reg_t hwacha_##name(processor_t*, insn_t, reg_t); \
44 if ((insn.bits() & mask) == match) { \
45 npc = hwacha_##name(p, insn, pc); \
48 #include "opcodes_hwacha.h"
51 catch (trap_instruction_access_fault
& t
)
53 h
->take_exception(HWACHA_CAUSE_VF_FAULT_FETCH
, h
->get_ct_state()->vf_pc
);
55 catch (trap_illegal_instruction
& t
)
57 h
->take_exception(HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION
, h
->get_ct_state()->vf_pc
);
59 catch (trap_load_address_misaligned
& t
)
61 h
->take_exception(HWACHA_CAUSE_MISALIGNED_LOAD
, t
.get_badvaddr());
63 catch (trap_store_address_misaligned
& t
)
65 h
->take_exception(HWACHA_CAUSE_MISALIGNED_STORE
, t
.get_badvaddr());
67 catch (trap_load_access_fault
& t
)
69 h
->take_exception(HWACHA_CAUSE_FAULT_LOAD
, t
.get_badvaddr());
71 catch (trap_store_access_fault
& t
)
73 h
->take_exception(HWACHA_CAUSE_FAULT_STORE
, t
.get_badvaddr());
77 h
->take_exception(HWACHA_CAUSE_ILLEGAL_INSTRUCTION
, uint32_t(insn
.bits()));
82 std::vector
<insn_desc_t
> hwacha_t::get_instructions()
84 std::vector
<insn_desc_t
> insns
;
85 insns
.push_back((insn_desc_t
){0x0b, 0x7f, &::illegal_instruction
, custom
});
86 insns
.push_back((insn_desc_t
){0x2b, 0x7f, &::illegal_instruction
, custom
});
87 insns
.push_back((insn_desc_t
){0x5b, 0x7f, &::illegal_instruction
, custom
});
88 insns
.push_back((insn_desc_t
){0x7b, 0x7f, &::illegal_instruction
, custom
});
92 bool hwacha_t::vf_active()
94 for (uint32_t i
=0; i
<get_ct_state()->vl
; i
++) {
95 if (get_ut_state(i
)->run
)
101 void hwacha_t::take_exception(reg_t c
, reg_t a
)
106 throw std::logic_error("unreachable!");