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9251ae90048a37aedb8af850979e59ff239b63c4
[riscv-isa-sim.git]
/
hwacha
/
insns_ut
/
ut_fcvt_d_h.h
1
require_fp
;
2
softfloat_roundingMode
=
RM
;
3
WRITE_FRD
(
f32_to_f64
(
HFRS1
));
4
set_fp_exceptions
;