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89dc473c1fbe7f76257d407bc912815bc39320e0
[riscv-isa-sim.git]
/
hwacha
/
insns_ut
/
ut_fcvt_h_d.h
1
require_fp
;
2
softfloat_roundingMode
=
RM
;
3
WRITE_HFRD
(
f64_to_f32
(
FRS1
));
4
set_fp_exceptions
;