924b0c7b3802d42d72a711874ddefc04d8bb0e02
[riscv-isa-sim.git] / hwacha / insns_ut / ut_fdiv_h.h
1 require_fp;
2 softfloat_roundingMode = RM;
3 WRITE_HFRD(f32_div(HFRS1, HFRS2));
4 set_fp_exceptions;