323a8d0442eab5b8d98758f1f5399ade048df761
[riscv-isa-sim.git] / hwacha / insns_ut / ut_fmsub_h.h
1 require_fp;
2 softfloat_roundingMode = RM;
3 WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, HFRS3 ^ (uint32_t)INT32_MIN));
4 set_fp_exceptions;