[riscv-isa-sim.git] / hwacha / insns_ut / ut_fmul_h.h

require_fp;
softfloat_roundingMode = RM;
WRITE_HFRD(f32_mulAdd(HFRS1, HFRS2, (HFRS1 ^ HFRS2) & (uint32_t)INT32_MIN));
set_fp_exceptions;