102fb2524da1580fb8a730a67e9172ea6dd8bcd2
[riscv-isa-sim.git] / riscv / insns / c_addi4spn.h
1 require_extension('C');
2 WRITE_RVC_RS2S(sext_xlen(RVC_SP + insn.rvc_addi4spn_imm()));