0ceb04025a017e6d8ea8ae723919d9f37cb3a6d0
[riscv-isa-sim.git] / riscv / insns / divuw.h
1 require_xpr64;
2 if(RS2 == 0)
3 RD = UINT64_MAX;
4 else
5 RD = sext32(zext32(RS1) / zext32(RS2));