2df321b5f9eb4088f6d9f5e304f372be45407833
[riscv-isa-sim.git] / riscv / insns / fnmadd_s.h
1 require_fp;
2 softfloat_roundingMode = RM;
3 WRITE_FRD(f32_mulAdd(FRS1 ^ (uint32_t)INT32_MIN, FRS2, FRS3 ^ (uint32_t)INT32_MIN));
4 set_fp_exceptions;