72912768da04afb9cbb6470fd7f8e66a07e9fa13
[riscv-isa-sim.git] / riscv / insns / slli.h
1 if (xlen == 64)
2 WRITE_RD(RS1 << SHAMT);
3 else
4 {
5 if(SHAMT & 0x20)
6 throw trap_illegal_instruction();
7 WRITE_RD(sext32(RS1 << SHAMT));
8 }