riscv/sim.h

   1 // See LICENSE for license details.
   2
   3 #ifndef _RISCV_SIM_H
   4 #define _RISCV_SIM_H
   5
   6 #include <vector>
   7 #include <string>
   8 #include <memory>
   9 #include "processor.h"
  10 #include "devices.h"
  11 #include "debug_module.h"
  12
  13 class htif_isasim_t;
  14 class mmu_t;
  15 class gdbserver_t;
  16
  17 // this class encapsulates the processors and memory in a RISC-V machine.
  18 class sim_t
  19 {
  20 public:
  21   sim_t(const char* isa, size_t _nprocs, size_t mem_mb, bool halted,
  22         const std::vector<std::string>& htif_args);
  23   ~sim_t();
  24
  25   // run the simulation to completion
  26   int run();
  27   bool running();
  28   void set_debug(bool value);
  29   void set_log(bool value);
  30   void set_histogram(bool value);
  31   void set_procs_debug(bool value);
  32   void set_gdbserver(gdbserver_t* gdbserver) { this->gdbserver = gdbserver; }
  33   htif_isasim_t* get_htif() { return htif.get(); }
  34   const char* get_config_string() { return config_string.c_str(); }
  35
  36   // returns the number of processors in this simulator
  37   size_t num_cores() { return procs.size(); }
  38   processor_t* get_core(size_t i) { return procs.at(i); }
  39
  40 private:
  41   std::unique_ptr<htif_isasim_t> htif;
  42   char* mem; // main memory
  43   size_t memsz; // memory size in bytes
  44   mmu_t* debug_mmu;  // debug port into main memory
  45   std::vector<processor_t*> procs;
  46   std::string config_string;
  47   std::unique_ptr<rom_device_t> boot_rom;
  48   std::unique_ptr<rtc_t> rtc;
  49   bus_t bus;
  50   debug_module_t debug_module;
  51
  52   processor_t* get_core(const std::string& i);
  53   void step(size_t n); // step through simulation
  54   static const size_t INTERLEAVE = 5000;
  55   static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core
  56   size_t current_step;
  57   size_t current_proc;
  58   bool debug;
  59   bool log;
  60   bool histogram_enabled; // provide a histogram of PCs
  61   gdbserver_t* gdbserver;
  62
  63   // memory-mapped I/O routines
  64   bool addr_is_mem(reg_t addr) {
  65     return addr >= DRAM_BASE && addr < DRAM_BASE + memsz;
  66   }
  67   char* addr_to_mem(reg_t addr) { return mem + addr - DRAM_BASE; }
  68   reg_t mem_to_addr(char* x) { return x - mem + DRAM_BASE; }
  69   bool mmio_load(reg_t addr, size_t len, uint8_t* bytes);
  70   bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes);
  71   void make_config_string();
  72
  73   // presents a prompt for introspection into the simulation
  74   void interactive();
  75
  76   // functions that help implement interactive()
  77   void interactive_help(const std::string& cmd, const std::vector<std::string>& args);
  78   void interactive_quit(const std::string& cmd, const std::vector<std::string>& args);
  79   void interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
  80   void interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args);
  81   void interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args);
  82   void interactive_reg(const std::string& cmd, const std::vector<std::string>& args);
  83   void interactive_fregs(const std::string& cmd, const std::vector<std::string>& args);
  84   void interactive_fregd(const std::string& cmd, const std::vector<std::string>& args);
  85   void interactive_pc(const std::string& cmd, const std::vector<std::string>& args);
  86   void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
  87   void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
  88   void interactive_until(const std::string& cmd, const std::vector<std::string>& args);
  89   reg_t get_reg(const std::vector<std::string>& args);
  90   reg_t get_freg(const std::vector<std::string>& args);
  91   reg_t get_mem(const std::vector<std::string>& args);
  92   reg_t get_pc(const std::vector<std::string>& args);
  93
  94   friend class htif_isasim_t;
  95   friend class processor_t;
  96   friend class mmu_t;
  97   friend class gdbserver_t;
  98 };
  99
 100 extern volatile bool ctrlc_pressed;
 101
 102 #endif