riscv/sim.h

   1 // See LICENSE for license details.
   2
   3 #ifndef _RISCV_SIM_H
   4 #define _RISCV_SIM_H
   5
   6 #include <vector>
   7 #include <string>
   8 #include <memory>
   9 #include "processor.h"
  10 #include "devices.h"
  11 #include "gdbserver.h"
  12
  13 class htif_isasim_t;
  14 class mmu_t;
  15
  16 // this class encapsulates the processors and memory in a RISC-V machine.
  17 class sim_t
  18 {
  19 public:
  20   sim_t(const char* isa, size_t _nprocs, size_t mem_mb,
  21         const std::vector<std::string>& htif_args);
  22   ~sim_t();
  23
  24   // run the simulation to completion
  25   int run();
  26   bool running();
  27   void set_debug(bool value);
  28   void set_log(bool value);
  29   void set_histogram(bool value);
  30   void set_procs_debug(bool value);
  31   void set_gdbserver(gdbserver_t* gdbserver) { this->gdbserver = gdbserver; }
  32   htif_isasim_t* get_htif() { return htif.get(); }
  33   const char* get_config_string() { return config_string.c_str(); }
  34
  35   // returns the number of processors in this simulator
  36   size_t num_cores() { return procs.size(); }
  37   processor_t* get_core(size_t i) { return procs.at(i); }
  38
  39 private:
  40   std::unique_ptr<htif_isasim_t> htif;
  41   char* mem; // main memory
  42   size_t memsz; // memory size in bytes
  43   mmu_t* debug_mmu;  // debug port into main memory
  44   std::vector<processor_t*> procs;
  45   std::string config_string;
  46   std::unique_ptr<rom_device_t> boot_rom;
  47   std::unique_ptr<rtc_t> rtc;
  48   bus_t bus;
  49
  50   processor_t* get_core(const std::string& i);
  51   void step(size_t n); // step through simulation
  52   static const size_t INTERLEAVE = 5000;
  53   static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core
  54   size_t current_step;
  55   size_t current_proc;
  56   bool debug;
  57   bool log;
  58   bool histogram_enabled; // provide a histogram of PCs
  59   gdbserver_t* gdbserver;
  60
  61   // memory-mapped I/O routines
  62   bool addr_is_mem(reg_t addr) {
  63     return addr >= DRAM_BASE && addr < DRAM_BASE + memsz;
  64   }
  65   char* addr_to_mem(reg_t addr) { return mem + addr - DRAM_BASE; }
  66   reg_t mem_to_addr(char* x) { return x - mem + DRAM_BASE; }
  67   bool mmio_load(reg_t addr, size_t len, uint8_t* bytes);
  68   bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes);
  69   void make_config_string();
  70
  71   // presents a prompt for introspection into the simulation
  72   void interactive();
  73
  74   // functions that help implement interactive()
  75   void interactive_help(const std::string& cmd, const std::vector<std::string>& args);
  76   void interactive_quit(const std::string& cmd, const std::vector<std::string>& args);
  77   void interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
  78   void interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args);
  79   void interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args);
  80   void interactive_reg(const std::string& cmd, const std::vector<std::string>& args);
  81   void interactive_fregs(const std::string& cmd, const std::vector<std::string>& args);
  82   void interactive_fregd(const std::string& cmd, const std::vector<std::string>& args);
  83   void interactive_pc(const std::string& cmd, const std::vector<std::string>& args);
  84   void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
  85   void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
  86   void interactive_until(const std::string& cmd, const std::vector<std::string>& args);
  87   reg_t get_reg(const std::vector<std::string>& args);
  88   reg_t get_freg(const std::vector<std::string>& args);
  89   reg_t get_mem(const std::vector<std::string>& args);
  90   reg_t get_pc(const std::vector<std::string>& args);
  91
  92   friend class htif_isasim_t;
  93   friend class processor_t;
  94   friend class mmu_t;
  95 };
  96
  97 extern volatile bool ctrlc_pressed;
  98
  99 #endif