12a1c04b72392b6bbc71d3a0df97741566d02142
[riscv-isa-sim.git] / riscv / trap.h
1 #ifndef _RISCV_TRAP_H
2 #define _RISCV_TRAP_H
3
4 #define TRAP_LIST \
5 DECLARE_TRAP(instruction_address_misaligned), \
6 DECLARE_TRAP(instruction_access_fault), \
7 DECLARE_TRAP(illegal_instruction), \
8 DECLARE_TRAP(privileged_instruction), \
9 DECLARE_TRAP(fp_disabled), \
10 DECLARE_TRAP(interrupt), \
11 DECLARE_TRAP(syscall), \
12 DECLARE_TRAP(breakpoint), \
13 DECLARE_TRAP(load_address_misaligned), \
14 DECLARE_TRAP(store_address_misaligned), \
15 DECLARE_TRAP(load_access_fault), \
16 DECLARE_TRAP(store_access_fault), \
17 DECLARE_TRAP(vector_disabled), \
18 DECLARE_TRAP(vector_bank), \
19 DECLARE_TRAP(vector_illegal_instruction), \
20 DECLARE_TRAP(reserved1), \
21 DECLARE_TRAP(reserved2), \
22 DECLARE_TRAP(reserved3), \
23 DECLARE_TRAP(int0), \
24 DECLARE_TRAP(int1), \
25 DECLARE_TRAP(int2), \
26 DECLARE_TRAP(int3), \
27 DECLARE_TRAP(int4), \
28 DECLARE_TRAP(int5), \
29 DECLARE_TRAP(int6), \
30 DECLARE_TRAP(int7), \
31
32 #define DECLARE_TRAP(x) trap_##x
33 enum trap_t
34 {
35 TRAP_LIST
36 NUM_TRAPS
37 };
38
39 struct halt_t {}; // thrown to stop the processor from running
40
41 extern "C" const char* trap_name(trap_t t);
42
43 #endif