Support debug system bus access.

[riscv-isa-sim.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index adc99bfc5963367bf445640bfee56106613f5e4e..14326e9c6be405c534ca82fcd3767295256d91d7 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -1,3 +1,7 @@
 build/
+*.gch
 autom4te.cache/
-riscv/dispatch.h
+.*.swp
+*.o
+*.d
+.gdb_history