WIP. Doesn't work.
[riscv-isa-sim.git] / riscv / debug_module.h
index 36037b402684e640b488f90af709572433b4328e..82c449ef6a70a699af5438db8a9adc83e353a356 100644 (file)
@@ -100,7 +100,7 @@ class debug_module_t : public abstract_device_t
     static const unsigned debug_data_start = 0x380;
     unsigned debug_progbuf_start;
 
-    static const unsigned debug_abstract_size = 2;
+    static const unsigned debug_abstract_size = 5;
     unsigned debug_abstract_start;
 
     static const unsigned hartsellen = 10;