work towards rvc 1.8

[riscv-isa-sim.git] / riscv / insns / c_addi4spn.h

diff --git a/riscv/insns/c_addi4spn.h b/riscv/insns/c_addi4spn.h
index 102fb2524da1580fb8a730a67e9172ea6dd8bcd2..e5f3832f605b43ccc35106fe5b61570eca4ce6d6 100644 (file)
--- a/riscv/insns/c_addi4spn.h
+++ b/riscv/insns/c_addi4spn.h
@@ -1,2 +1,3 @@
 require_extension('C');
+require(insn.rvc_addi4spn_imm() != 0);
 WRITE_RVC_RS2S(sext_xlen(RVC_SP + insn.rvc_addi4spn_imm()));