New RV64C proposal
[riscv-isa-sim.git] / riscv / insns / c_ldsp.h
index 42665cfed0e0f40629fcd56846a4b64e06425312..7047d530d0fd155b801e54b0fb3aeace33ea8396 100644 (file)
@@ -1,3 +1,4 @@
 require_extension('C');
 require_rv64;
+require(insn.rvc_rd() != 0);
 WRITE_RD(MMU.load_int64(RVC_SP + insn.rvc_ldsp_imm()));