New RV64C proposal

[riscv-isa-sim.git] / riscv / insns / c_lui.h

diff --git a/riscv/insns/c_lui.h b/riscv/insns/c_lui.h
index 4bd4f87de91f034268cec9870dae326f48273e0a..040d7ecb4af31f2cc305b75958b5deb036735f5a 100644 (file)
--- a/riscv/insns/c_lui.h
+++ b/riscv/insns/c_lui.h
@@ -1,2 +1,9 @@
 require_extension('C');
-WRITE_RD(insn.rvc_imm() << 12);
+require(insn.rvc_rd() != 0);
+if (insn.rvc_imm() == 0) { // c.jalr
+  reg_t tmp = npc;
+  set_pc(RVC_RS1 & ~reg_t(1));
+  WRITE_REG(X_RA, tmp);
+} else {
+  WRITE_RD(insn.rvc_imm() << 12);
+}