Support setting ISA/subsets with --isa flag

[riscv-isa-sim.git] / riscv / insns / c_lw.h

diff --git a/riscv/insns/c_lw.h b/riscv/insns/c_lw.h
index 9c6f470cd23ec1137ba78cfb826e27b65dff870e..f2fc2991d32a0fe5925cf048c8a6bf9fb0892605 100644 (file)
--- a/riscv/insns/c_lw.h
+++ b/riscv/insns/c_lw.h
@@ -1,2 +1,2 @@
-require_rvc;
+require_extension('C');
 WRITE_RVC_RDS(MMU.load_int32(RVC_RS1S + insn.rvc_lw_imm()));